From patchwork Tue Nov 20 15:27:37 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 1774411 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id AD8D1DF230 for ; Tue, 20 Nov 2012 15:29:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 93E25E6309 for ; Tue, 20 Nov 2012 07:29:35 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-gg0-f177.google.com (mail-gg0-f177.google.com [209.85.161.177]) by gabe.freedesktop.org (Postfix) with ESMTP id A8596E630F for ; Tue, 20 Nov 2012 07:28:02 -0800 (PST) Received: by mail-gg0-f177.google.com with SMTP id y3so680521ggc.36 for ; Tue, 20 Nov 2012 07:28:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=nCGyusswX/B+j0fmCBblkhxuD3GIFyxS4HpoRN0Cw/M=; b=kIPwjksPnp0T94dr2NlHLLrLwNR3F9mxffSdDiu+0JcFn8lkj07skRPnV3GqVYTinF 5T9GmdPN1Tym1111b6/0w1EvI8UFROCtX0H+BVjB8PEYRjdfZyrA76cZy7vBz/ZpQX+b YnL2Yeoo3LalLT14UZeO6HnXWa8ppPQy92wPmqtJ6PVPCYUAYafaqjYQmCatoxP9fY92 q1UoLnsZXFnRCGxp/L3KvNyPZ2TMW2fzjGkDU2U4tI+Zg4EK55XDGosdbuj/t384/5Af +GdTg2bW/5p6lELW/hhEqQe0Vs4O9FsEE26I+wYRmvM62psxr4x2vN+MpoZVV0WH6Mo6 VZvg== Received: by 10.236.48.37 with SMTP id u25mr15848863yhb.4.1353425282529; Tue, 20 Nov 2012 07:28:02 -0800 (PST) Received: from vicky.domain.invalid ([177.156.19.106]) by mx.google.com with ESMTPS id a7sm13068544yhe.14.2012.11.20.07.28.01 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 20 Nov 2012 07:28:02 -0800 (PST) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 20 Nov 2012 13:27:37 -0200 Message-Id: <1353425264-3728-4-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1353425264-3728-1-git-send-email-przanoni@gmail.com> References: <1353425264-3728-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 03/10] drm/i915: use cpu/pch transcoder on intel_enable_pipe X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Paulo Zanoni This function runs on Haswell, so set the correct pch_transcoder and cpu_transcoder variables. This fixes an assertion failure on Haswell VGA. Signed-off-by: Paulo Zanoni Reviewed-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_display.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 9940765..e4d7079 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1812,9 +1812,15 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, { enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv, pipe); + enum transcoder pch_transcoder; int reg; u32 val; + if (IS_HASWELL(dev_priv->dev)) + pch_transcoder = TRANSCODER_A; + else + pch_transcoder = pipe; + /* * A pipe without a PLL won't actually be able to drive bits from * a plane. On ILK+ the pipe PLLs are integrated, so we don't @@ -1825,8 +1831,8 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, else { if (pch_port) { /* if driving the PCH, we need FDI enabled */ - assert_fdi_rx_pll_enabled(dev_priv, pipe); - assert_fdi_tx_pll_enabled(dev_priv, pipe); + assert_fdi_rx_pll_enabled(dev_priv, pch_transcoder); + assert_fdi_tx_pll_enabled(dev_priv, cpu_transcoder); } /* FIXME: assert CPU port conditions for SNB+ */ }