From patchwork Thu Nov 22 10:51:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kuoppala X-Patchwork-Id: 1783411 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id BD0E63FC64 for ; Thu, 22 Nov 2012 11:07:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B5E75E5CF9 for ; Thu, 22 Nov 2012 03:07:04 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 0E62F436B0 for ; Thu, 22 Nov 2012 02:51:42 -0800 (PST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 22 Nov 2012 02:51:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.83,299,1352102400"; d="scan'208";a="251007949" Received: from rosetta.fi.intel.com (HELO rosetta) ([10.237.72.62]) by fmsmga001.fm.intel.com with ESMTP; 22 Nov 2012 02:51:29 -0800 Received: by rosetta (Postfix, from userid 1000) id 04A13644EC1; Thu, 22 Nov 2012 12:51:34 +0200 (EET) From: Mika Kuoppala To: intel-gfx@lists.freedesktop.org Date: Thu, 22 Nov 2012 12:51:28 +0200 Message-Id: <1353581490-5822-4-git-send-email-mika.kuoppala@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1353581490-5822-1-git-send-email-mika.kuoppala@intel.com> References: <1353581490-5822-1-git-send-email-mika.kuoppala@intel.com> Cc: Mika Kuoppala Subject: [Intel-gfx] [PATCH 3/5] drm/i915: Add i915_gem_alloc_seqno X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Hardware can't handle seqno wrapping so all previous requests need to be retired before seqno can wrap. As this can fail, make seqno allocation explicit by introducing i915_gem_alloc_seqno() Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem.c | 51 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f511fa2..598f3b8 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1387,6 +1387,7 @@ i915_seqno_passed(uint32_t seq1, uint32_t seq2) return (int32_t)(seq1 - seq2) >= 0; } +int i915_gem_alloc_seqno(struct intel_ring_buffer *ring, u32 *seqno); u32 i915_gem_next_request_seqno(struct intel_ring_buffer *ring); int __must_check i915_gem_object_get_fence(struct drm_i915_gem_object *obj); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 7e17382..a637d5d 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1933,6 +1933,34 @@ i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj) WARN_ON(i915_verify_lists(dev)); } +static int +i915_gem_handle_seqno_wrap(struct drm_device *dev) +{ + drm_i915_private_t *dev_priv = dev->dev_private; + struct intel_ring_buffer *ring; + int ret; + int i; + + /* The GPU can not handle its semaphore value wrapping, + + * so every billion or so execbuffers, we need to stall + * the GPU in order to reset the counters. + */ + + ret = i915_gpu_idle(dev); + if (ret) + return ret; + + i915_gem_retire_requests(dev); + + for_each_ring(ring, dev_priv, i) { + int j; + for (j = 0; j < ARRAY_SIZE(ring->sync_seqno); j++) + BUG_ON(ring->sync_seqno[j]); + } + + return 0; +} + static u32 i915_gem_get_seqno(struct drm_device *dev) { @@ -1956,6 +1984,29 @@ i915_gem_next_request_seqno(struct intel_ring_buffer *ring) } int +i915_gem_alloc_seqno(struct intel_ring_buffer *ring, u32 *seqno) +{ + drm_i915_private_t *dev_priv = ring->dev->dev_private; + int ret; + + /* reserve 0 for non-seqno */ + if (unlikely(dev_priv->next_seqno == ~0)) { + ret = i915_gem_handle_seqno_wrap(ring->dev); + if (ret) + return ret; + + dev_priv->next_seqno = 1; + } + + dev_priv->next_seqno++; + + if (seqno) + *seqno = i915_gem_next_request_seqno(ring); + + return 0; +} + +int i915_add_request(struct intel_ring_buffer *ring, struct drm_file *file, u32 *out_seqno)