@@ -2047,7 +2047,7 @@ i915_add_request(struct intel_ring_buffer *ring,
*/
request_ring_position = intel_ring_get_tail(ring);
- ret = ring->add_request(ring, &seqno);
+ ret = ring->add_request(ring, seqno);
if (ret) {
kfree(request);
return ret;
@@ -577,7 +577,7 @@ update_mboxes(struct intel_ring_buffer *ring,
*/
static int
gen6_add_request(struct intel_ring_buffer *ring,
- u32 *seqno)
+ u32 seqno)
{
u32 mbox1_reg;
u32 mbox2_reg;
@@ -590,13 +590,11 @@ gen6_add_request(struct intel_ring_buffer *ring,
mbox1_reg = ring->signal_mbox[0];
mbox2_reg = ring->signal_mbox[1];
- *seqno = i915_gem_next_request_seqno(ring);
-
- update_mboxes(ring, *seqno, mbox1_reg);
- update_mboxes(ring, *seqno, mbox2_reg);
+ update_mboxes(ring, seqno, mbox1_reg);
+ update_mboxes(ring, seqno, mbox2_reg);
intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
- intel_ring_emit(ring, *seqno);
+ intel_ring_emit(ring, seqno);
intel_ring_emit(ring, MI_USER_INTERRUPT);
intel_ring_advance(ring);
@@ -654,9 +652,8 @@ do { \
static int
pc_render_add_request(struct intel_ring_buffer *ring,
- u32 *result)
+ u32 seqno)
{
- u32 seqno = i915_gem_next_request_seqno(ring);
struct pipe_control *pc = ring->private;
u32 scratch_addr = pc->gtt_offset + 128;
int ret;
@@ -700,7 +697,6 @@ pc_render_add_request(struct intel_ring_buffer *ring,
intel_ring_emit(ring, 0);
intel_ring_advance(ring);
- *result = seqno;
return 0;
}
@@ -889,9 +885,8 @@ bsd_ring_flush(struct intel_ring_buffer *ring,
static int
i9xx_add_request(struct intel_ring_buffer *ring,
- u32 *result)
+ u32 seqno)
{
- u32 seqno;
int ret;
ret = intel_ring_begin(ring, 4);
@@ -906,7 +901,6 @@ i9xx_add_request(struct intel_ring_buffer *ring,
intel_ring_emit(ring, MI_USER_INTERRUPT);
intel_ring_advance(ring);
- *result = seqno;
return 0;
}
@@ -71,7 +71,7 @@ struct intel_ring_buffer {
u32 invalidate_domains,
u32 flush_domains);
int (*add_request)(struct intel_ring_buffer *ring,
- u32 *seqno);
+ u32 seqno);
/* Some chipsets are not quite as coherent as advertised and need
* an expensive kick to force a true read of the up-to-date seqno.
* However, the up-to-date seqno is not always required and the last
Sequence numbers are preallocated so make them immutable in ring->add_request(). Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> --- drivers/gpu/drm/i915/i915_gem.c | 2 +- drivers/gpu/drm/i915/intel_ringbuffer.c | 18 ++++++------------ drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +- 3 files changed, 8 insertions(+), 14 deletions(-)