From patchwork Thu Nov 22 10:51:30 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kuoppala X-Patchwork-Id: 1783421 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id D04DCDF24C for ; Thu, 22 Nov 2012 11:07:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 773E9E63F0 for ; Thu, 22 Nov 2012 03:07:32 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id A8853436DE for ; Thu, 22 Nov 2012 02:51:42 -0800 (PST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 22 Nov 2012 02:51:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.83,299,1352102400"; d="scan'208";a="251007950" Received: from rosetta.fi.intel.com (HELO rosetta) ([10.237.72.62]) by fmsmga001.fm.intel.com with ESMTP; 22 Nov 2012 02:51:31 -0800 Received: by rosetta (Postfix, from userid 1000) id 099A8644EC5; Thu, 22 Nov 2012 12:51:34 +0200 (EET) From: Mika Kuoppala To: intel-gfx@lists.freedesktop.org Date: Thu, 22 Nov 2012 12:51:30 +0200 Message-Id: <1353581490-5822-6-git-send-email-mika.kuoppala@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1353581490-5822-1-git-send-email-mika.kuoppala@intel.com> References: <1353581490-5822-1-git-send-email-mika.kuoppala@intel.com> Cc: Mika Kuoppala Subject: [Intel-gfx] [PATCH 5/5] drm/i915: don't return seqno from ring->add_request() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Sequence numbers are preallocated so make them immutable in ring->add_request(). Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_gem.c | 2 +- drivers/gpu/drm/i915/intel_ringbuffer.c | 18 ++++++------------ drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +- 3 files changed, 8 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 858f14f..d95c34d 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2047,7 +2047,7 @@ i915_add_request(struct intel_ring_buffer *ring, */ request_ring_position = intel_ring_get_tail(ring); - ret = ring->add_request(ring, &seqno); + ret = ring->add_request(ring, seqno); if (ret) { kfree(request); return ret; diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index ecbc5c5..44aa76f 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -577,7 +577,7 @@ update_mboxes(struct intel_ring_buffer *ring, */ static int gen6_add_request(struct intel_ring_buffer *ring, - u32 *seqno) + u32 seqno) { u32 mbox1_reg; u32 mbox2_reg; @@ -590,13 +590,11 @@ gen6_add_request(struct intel_ring_buffer *ring, mbox1_reg = ring->signal_mbox[0]; mbox2_reg = ring->signal_mbox[1]; - *seqno = i915_gem_next_request_seqno(ring); - - update_mboxes(ring, *seqno, mbox1_reg); - update_mboxes(ring, *seqno, mbox2_reg); + update_mboxes(ring, seqno, mbox1_reg); + update_mboxes(ring, seqno, mbox2_reg); intel_ring_emit(ring, MI_STORE_DWORD_INDEX); intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT); - intel_ring_emit(ring, *seqno); + intel_ring_emit(ring, seqno); intel_ring_emit(ring, MI_USER_INTERRUPT); intel_ring_advance(ring); @@ -654,9 +652,8 @@ do { \ static int pc_render_add_request(struct intel_ring_buffer *ring, - u32 *result) + u32 seqno) { - u32 seqno = i915_gem_next_request_seqno(ring); struct pipe_control *pc = ring->private; u32 scratch_addr = pc->gtt_offset + 128; int ret; @@ -700,7 +697,6 @@ pc_render_add_request(struct intel_ring_buffer *ring, intel_ring_emit(ring, 0); intel_ring_advance(ring); - *result = seqno; return 0; } @@ -889,9 +885,8 @@ bsd_ring_flush(struct intel_ring_buffer *ring, static int i9xx_add_request(struct intel_ring_buffer *ring, - u32 *result) + u32 seqno) { - u32 seqno; int ret; ret = intel_ring_begin(ring, 4); @@ -906,7 +901,6 @@ i9xx_add_request(struct intel_ring_buffer *ring, intel_ring_emit(ring, MI_USER_INTERRUPT); intel_ring_advance(ring); - *result = seqno; return 0; } diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 2ea7a31..66b9a3b 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -71,7 +71,7 @@ struct intel_ring_buffer { u32 invalidate_domains, u32 flush_domains); int (*add_request)(struct intel_ring_buffer *ring, - u32 *seqno); + u32 seqno); /* Some chipsets are not quite as coherent as advertised and need * an expensive kick to force a true read of the up-to-date seqno. * However, the up-to-date seqno is not always required and the last