From patchwork Mon Nov 26 16:22:17 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1803851 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id B2C9CDF2EB for ; Mon, 26 Nov 2012 17:06:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 93FEBE5D04 for ; Mon, 26 Nov 2012 09:06:45 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id EC192E61A5 for ; Mon, 26 Nov 2012 08:31:49 -0800 (PST) Received: by mail-ee0-f49.google.com with SMTP id c4so4658008eek.36 for ; Mon, 26 Nov 2012 08:31:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=P4WyfzvUSJU0zlIbEXdfV5yt+jiQrbb3hdITtg8b3rU=; b=h/AeeiGVJAgIynqtssX5eJ7nchXS8UIgGkaYXJt5fwmsQ67YqfSbDB8DfjjEtBO3oz y2IurnWRKMWDS88A760riS8vo3Ofjq5FwXw+XkgUruunulRpLYpd4h36iO0ibzvrsEgc kgzqyfWKua5+LhofVKa5Xrs/eSCmDGdvqV1KM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=P4WyfzvUSJU0zlIbEXdfV5yt+jiQrbb3hdITtg8b3rU=; b=eDysepLE1Hm98PgRXdO7c1tkvghP7bzg1jXBSzmO9ib4KRLkPEi5x+JoNgXzpVT7VQ zPiLlfMsvOooHEl5JegQgNKatS9AmJ/d9DFN+T+rkdyy0Ghh5E7d3VQY9faudJEdpVg4 7cKT32beV8gvxrIk9/yYSdprmr4UExkTM/1pM5TYnWPPdPQoyRENRoXZIuS4wAgA3Wz7 z7A6+8s1G6kyjmvme2zSDUwcwvwflhq6VQT8IItewX5I4Hx7IwVBcMLtJYIxFjtzw5IM xrDyuGmhSidNgCiu9kebDgz+HJYWCa40ZhJuax6h4U/Qiz/NLDQ3cW2Cq9ZtEoXKW0ns jP5A== Received: by 10.14.207.68 with SMTP id m44mr47088667eeo.40.1353947509735; Mon, 26 Nov 2012 08:31:49 -0800 (PST) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id f49sm4255021eep.12.2012.11.26.08.31.48 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 26 Nov 2012 08:31:49 -0800 (PST) From: Daniel Vetter To: Intel Graphics Development Date: Mon, 26 Nov 2012 17:22:17 +0100 Message-Id: <1353946943-18745-12-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1353946943-18745-1-git-send-email-daniel.vetter@ffwll.ch> References: <1353946943-18745-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQkO08zXHdBvWqgVN/MOsyTJ+3zgAo6iBq2QoujBRZrIIp5oP3A8tuyf6ULI0rB3jH8T4nGw Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 11/17] drm/i915: use wait_for_vblank instead of msleep(17) X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org 17 ms is eerily close to 60 Hz ^-1 Unfortunately this goes back to the original DP enabling for ilk, and unfortunately does not come with a reason for it's existance attached. Some closer inspection of the code and DP specs shows that we set the idle link pattern before we disable the port. And it seems like that the DP spec (or at least our hw) only switch to the idle pattern on the next vblank. Hence a vblank wait at this spot makes _much_ more sense than a really long wait. v2: Rebase fixup. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_dp.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index b2aa666..b782094 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1988,6 +1988,8 @@ intel_dp_link_down(struct intel_dp *intel_dp) struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); struct drm_device *dev = intel_dig_port->base.base.dev; struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_crtc *intel_crtc = + to_intel_crtc(intel_dig_port->base.base.crtc); uint32_t DP = intel_dp->DP; /* @@ -2022,7 +2024,7 @@ intel_dp_link_down(struct intel_dp *intel_dp) } POSTING_READ(intel_dp->output_reg); - msleep(17); + intel_wait_for_vblank(dev, intel_crtc->pipe); if (HAS_PCH_IBX(dev) && I915_READ(intel_dp->output_reg) & DP_PIPEB_SELECT) { @@ -2054,7 +2056,7 @@ intel_dp_link_down(struct intel_dp *intel_dp) POSTING_READ(intel_dp->output_reg); msleep(50); } else - intel_wait_for_vblank(dev, to_intel_crtc(crtc)->pipe); + intel_wait_for_vblank(dev, intel_crtc->pipe); } DP &= ~DP_AUDIO_OUTPUT_ENABLE;