From patchwork Sat Dec 1 12:53:41 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1829101 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 23F393FCF6 for ; Sat, 1 Dec 2012 13:46:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2EA01E669F for ; Sat, 1 Dec 2012 05:46:44 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ea0-f177.google.com (mail-ea0-f177.google.com [209.85.215.177]) by gabe.freedesktop.org (Postfix) with ESMTP id A45E4E63C4 for ; Sat, 1 Dec 2012 05:03:09 -0800 (PST) Received: by mail-ea0-f177.google.com with SMTP id c10so540080eaa.36 for ; Sat, 01 Dec 2012 05:03:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=QjN78sRdsY+1iyG7UCRyLN7954kJ8GMKcWgweFK8pjs=; b=CBQQkVjrYLEPeoFbnf4/R7SlOskVVp4bzK/o1AUAwWkhS1ZS72DmEG4+P6iLTVsbsl m8ZAN7k0688tqKU+QMU5aQfDPnTnPM7vFQl6Y4Zw5MZ/q+tS924FngqeG0cdf20AG2Z4 tGOzkgQQvHJ1KWpc7dukbFR99QKOb1QIj4zSM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=QjN78sRdsY+1iyG7UCRyLN7954kJ8GMKcWgweFK8pjs=; b=MexZwgyqBLHJTvUJ7vyOvl+AfcbKvxgryXlxfpH+8niv1U8FFHZ+r9q4v+yPBqf1W/ Sa9POwsTQoxDEVMxvra8/pRJedjlfq8zy6b2QIY8dI6bGbe93WKV0L4FV2hJUm+pT2s0 /OhsclVI7L6poBOmu3uNOg+8+R/4kGiVdlj/7nKVfqLzQNgHq83oauQYK0ERt1pjvFqO 1HLRMXiahMm2sPJCkcTtZ1YfEfIeQqoYWvqHWvgh/VgvMWn2EPGel/kidWJKSIcg1HV5 FBXD3Mp9E3V1/xLKh7nz9wKxcXkkOKgdMQ4v7kGm7IL5zqpvLo+LTB+4eLFOgcMFVGx+ KFcA== Received: by 10.14.194.71 with SMTP id l47mr15815607een.6.1354366985695; Sat, 01 Dec 2012 05:03:05 -0800 (PST) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id f49sm17288642eep.12.2012.12.01.05.03.04 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 01 Dec 2012 05:03:05 -0800 (PST) From: Daniel Vetter To: Intel Graphics Development Date: Sat, 1 Dec 2012 13:53:41 +0100 Message-Id: <1354366429-2324-3-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1354366429-2324-1-git-send-email-daniel.vetter@ffwll.ch> References: <1354366429-2324-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQk9txkThxQqkpshrUQY6SnNWwl+5y9TZcfFperZlv2wQietzuwUblmIjgePoO0ij6d16LPX Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 02/10] drm/i915: don't handle PIPE_LEGACY_BLC_EVENT_STATUS on vlv X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org This is for legacy legacy stuff, and checking with the leftover pipe from the previous loop is propably not what we want. Since pipe == 2 after the loop ... Cc: Jesse Barnes Signed-off-by: Daniel Vetter Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_irq.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index ff78818..2028137 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -533,7 +533,6 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg) unsigned long irqflags; int pipe; u32 pipe_stats[I915_MAX_PIPES]; - bool blc_event; atomic_inc(&dev_priv->irq_received); @@ -590,9 +589,6 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg) I915_READ(PORT_HOTPLUG_STAT); } - if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS) - blc_event = true; - if (pm_iir & GEN6_PM_DEFERRED_EVENTS) gen6_queue_rps_work(dev_priv, pm_iir);