From patchwork Sat Dec 8 11:58:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1852411 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 9DF12DF23A for ; Sat, 8 Dec 2012 11:58:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 44D1BE5EB2 for ; Sat, 8 Dec 2012 03:58:50 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ea0-f177.google.com (mail-ea0-f177.google.com [209.85.215.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 831C8E5CD0 for ; Sat, 8 Dec 2012 03:58:40 -0800 (PST) Received: by mail-ea0-f177.google.com with SMTP id c10so480563eaa.36 for ; Sat, 08 Dec 2012 03:58:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer; bh=YoXoaN2zUz+eXRoUW4YZGdEQQEsQZwZmFmo3pfAtKFo=; b=BokFdniN0OT8U+4r+5xbhjOo5/q8MOlP31PZuAyogAAwNdNxX6RBQBDOPaYNc8MR5Q GY2dqg5UQqX/8uMP9IPcp0CnEyoRruW45aGFt9MbWq7tXYorAk3fPHa8p/EqUvh7cbNt 2TcIrAXjkOOZUxIVD22lfb8Qs0LMPfb9dvj9w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=YoXoaN2zUz+eXRoUW4YZGdEQQEsQZwZmFmo3pfAtKFo=; b=HdB3FD6FUjXWe+VOI3PwH9oqyZmN3EEZqMcBMbrB3Njx1PmpxAXWDQP2uJR1ZhcqBq SoWmDQmwFvpyQD7fCDb4ziQuzl/gjLin9ZF97FQvOJyKG/1Nt/j9RB0LXCLH2gnWmL3i QiJPdyzscXbzIeSlDO8IntzoCVef/DSHZfMjs/9qhatoSiTWmt65uWyoFs9BXLZMw9Ld cWClPgRdf+NGDsUQPVjtEAooQQi8ss68DAE3t59HzGO724qqVLu9Y6ES74i+ARiuuRqL fmSJ5cJzrCcKbHxKg3n7IkfVtS/mhIy9FNmsRDlfYaDPOBod8OVeqhPDp5S7qgoe8fte kHDQ== Received: by 10.14.194.195 with SMTP id m43mr28020629een.44.1354967919759; Sat, 08 Dec 2012 03:58:39 -0800 (PST) Received: from bremse.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id 44sm29121130eek.0.2012.12.08.03.58.38 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 08 Dec 2012 03:58:39 -0800 (PST) From: Daniel Vetter To: Intel Graphics Development Date: Sat, 8 Dec 2012 12:58:33 +0100 Message-Id: <1354967913-26186-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.4 X-Gm-Message-State: ALoCoQlLHV2kclLneIP3Wy5MTgxIJz9L8pT3ZIiG7H6avmDOAw7PuRqAzHSeoII4/IeQHuAqDYQa Cc: Daniel Vetter , "Runyan, Arthur J" , stable@vger.kernel.org Subject: [Intel-gfx] [PATCH] drm/i915: disable cpt phase pointer fdi rx workaround X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org We've originally added this in commit 291427f5fdadec6e4be2924172e83588880e1539 Author: Jesse Barnes Date: Fri Jul 29 12:42:37 2011 -0700 drm/i915: apply phase pointer override on SNB+ too and then copy-pasted it over to ivb/ppt. The w/a was originally added for ilk/ibx in commit 5b2adf897146edeac6a1e438fb67b5a53dbbdf34 Author: Jesse Barnes Date: Thu Oct 7 16:01:15 2010 -0700 drm/i915: add Ironlake clock gating workaround for FDI link training and fixed up a bit in commit 6f06ce184c765fd8d50669a8d12fdd566c920859 Author: Jesse Barnes Date: Tue Jan 4 15:09:38 2011 -0800 drm/i915: set phase sync pointer override enable before setting phase sync pointer It turns out that this w/a isn't actually required on cpt/ppt and positively harmful on ivb/ppt when using fdi B/C links - it results in a black screen occasionally, with seemingfully everything working as it should. The only failure indication I've found in the hw is that eventually (but not right after the modeset completes) a pipe underrun is signalled. Big thanks to Arthur Runyan for all the ideas for registers to check and changes to test, otherwise I couldn't ever have tracked this down! Cc: "Runyan, Arthur J" Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 29 ----------------------------- 1 file changed, 29 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b29259a..6929104 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2335,18 +2335,6 @@ static void intel_fdi_normal_train(struct drm_crtc *crtc) FDI_FE_ERRC_ENABLE); } -static void cpt_phase_pointer_enable(struct drm_device *dev, int pipe) -{ - struct drm_i915_private *dev_priv = dev->dev_private; - u32 flags = I915_READ(SOUTH_CHICKEN1); - - flags |= FDI_PHASE_SYNC_OVR(pipe); - I915_WRITE(SOUTH_CHICKEN1, flags); /* once to unlock... */ - flags |= FDI_PHASE_SYNC_EN(pipe); - I915_WRITE(SOUTH_CHICKEN1, flags); /* then again to enable */ - POSTING_READ(SOUTH_CHICKEN1); -} - static void ivb_modeset_global_resources(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; @@ -2521,8 +2509,6 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc) POSTING_READ(reg); udelay(150); - cpt_phase_pointer_enable(dev, pipe); - for (i = 0; i < 4; i++) { reg = FDI_TX_CTL(pipe); temp = I915_READ(reg); @@ -2655,8 +2641,6 @@ static void ivb_manual_fdi_link_train(struct drm_crtc *crtc) POSTING_READ(reg); udelay(150); - cpt_phase_pointer_enable(dev, pipe); - for (i = 0; i < 4; i++) { reg = FDI_TX_CTL(pipe); temp = I915_READ(reg); @@ -2791,17 +2775,6 @@ static void ironlake_fdi_pll_disable(struct intel_crtc *intel_crtc) udelay(100); } -static void cpt_phase_pointer_disable(struct drm_device *dev, int pipe) -{ - struct drm_i915_private *dev_priv = dev->dev_private; - u32 flags = I915_READ(SOUTH_CHICKEN1); - - flags &= ~(FDI_PHASE_SYNC_EN(pipe)); - I915_WRITE(SOUTH_CHICKEN1, flags); /* once to disable... */ - flags &= ~(FDI_PHASE_SYNC_OVR(pipe)); - I915_WRITE(SOUTH_CHICKEN1, flags); /* then again to lock */ - POSTING_READ(SOUTH_CHICKEN1); -} static void ironlake_fdi_disable(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; @@ -2828,8 +2801,6 @@ static void ironlake_fdi_disable(struct drm_crtc *crtc) /* Ironlake workaround, disable clock pointer after downing FDI */ if (HAS_PCH_IBX(dev)) { I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR); - } else if (HAS_PCH_CPT(dev)) { - cpt_phase_pointer_disable(dev, pipe); } /* still set train pattern 1 */