From patchwork Sat Dec 8 18:08:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Lespiau X-Patchwork-Id: 1853081 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 1A514DF223 for ; Sat, 8 Dec 2012 18:09:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 14C17E5D14 for ; Sat, 8 Dec 2012 10:09:54 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 39F18E5C78 for ; Sat, 8 Dec 2012 10:08:24 -0800 (PST) Received: by mail-we0-f177.google.com with SMTP id x48so611762wey.36 for ; Sat, 08 Dec 2012 10:08:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:x-mailer:in-reply-to:references; bh=FaPHeUMceP7gfcEWKFhx9w5pUWw68a9z39fmHdfnRAQ=; b=VIHXEBVnBArtNrOzJrFQOAiQOhU2BUJSlIc77j+VCON9+50JGjubUm4lih2T56bnHD izP/X6PHLg3ZYlK0k4F9J4rTWuLl7+cjYvjoDm/PlPoBQKm6RCugGXbwXg81eGhZweIN 8qzrIIFliK9v2inmNd8AxbEhboQ7fXXnrzaRf3eFS1bY/nY1Q52PV+N56XSNa0YahtEU 8nKPov9ID5w+rN1oyYMQuD21wpqD0m6PtnBTHu8RcUARSO0W38//EMJuxbJMJKzsjNgF 0PcnuL9gnWLRxNnRp5cNXt6KkqzJMRbuuvcsDL3EyFdgCZWAEpw2UFdvLIhXVkrctrjm qr6A== Received: by 10.216.93.145 with SMTP id l17mr19498wef.181.1354990104285; Sat, 08 Dec 2012 10:08:24 -0800 (PST) Received: from dyon.config (46-65-39-123.zone16.bethere.co.uk. [46.65.39.123]) by mx.google.com with ESMTPS id y3sm3071920wix.6.2012.12.08.10.08.23 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 08 Dec 2012 10:08:23 -0800 (PST) From: Damien Lespiau To: intel-gfx@lists.freedesktop.org Date: Sat, 8 Dec 2012 18:08:11 +0000 Message-Id: <1354990091-9629-4-git-send-email-damien.lespiau@gmail.com> X-Mailer: git-send-email 1.7.7.5 In-Reply-To: <1354990091-9629-1-git-send-email-damien.lespiau@gmail.com> References: <1354990091-9629-1-git-send-email-damien.lespiau@gmail.com> Subject: [Intel-gfx] [PATCH 3/3] drm/i915: Correctly enable CLKOUT_DP for ULT platoforms X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Damien Lespiau SBI_GEN0 is used instead of SBI_DBUFF0 on ULT platforms. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_display.c | 12 +++++++++--- 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index acf768d..90c4f43 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4563,6 +4563,8 @@ #define SBI_SSCAUXDIV_FINALDIV2SEL(x) ((x)<<4) #define SBI_DBUFF0 0x2a00 #define SBI_DBUFF0_ENABLE (1<<0) +#define SBI_GEN0 0x1f00 +#define SBI_GEN0_ENABLE (1<<0) /* LPT PIXCLK_GATE */ #define PIXCLK_GATE 0xC6020 diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0eba466..6472065 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5132,9 +5132,15 @@ static void lpt_init_pch_refclk(struct drm_device *dev) intel_sbi_write(dev_priv, 0x21EC, tmp, SBI_MPHY); } - tmp = intel_sbi_read(dev_priv, SBI_DBUFF0, SBI_ICLK); - tmp |= SBI_DBUFF0_ENABLE; - intel_sbi_write(dev_priv, SBI_DBUFF0, tmp, SBI_ICLK); + if (IS_ULT(dev)) { + tmp = intel_sbi_read(dev_priv, SBI_GEN0, SBI_ICLK); + tmp |= SBI_GEN0_ENABLE; + intel_sbi_write(dev_priv, SBI_GEN0, tmp, SBI_ICLK); + } else { + tmp = intel_sbi_read(dev_priv, SBI_DBUFF0, SBI_ICLK); + tmp |= SBI_DBUFF0_ENABLE; + intel_sbi_write(dev_priv, SBI_DBUFF0, tmp, SBI_ICLK); + } } /*