From patchwork Wed Dec 12 13:07:13 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1867071 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 85FD1DF215 for ; Wed, 12 Dec 2012 14:30:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6CF38E6609 for ; Wed, 12 Dec 2012 06:30:40 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 3A39DE64DB for ; Wed, 12 Dec 2012 05:15:18 -0800 (PST) Received: by mail-ee0-f49.google.com with SMTP id c4so430504eek.36 for ; Wed, 12 Dec 2012 05:15:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=LEutK0GsmCpO/79ZyhvUY7xlGTlMAkIpuAItck+V9Dk=; b=Znf88MmhdYS5wW1HeTPiVX5/CEEH+EmOOYyd7I2/K8btOAnsMWzpkusKfiJWy31vWj izEiU1UF4LA50MDfnJAAXgKVzLvJKCSi2uiVnQT5017g8GcfE25hmpzNI76NZIq9hNnQ DxRqJ4y7Zh1KiZQQ8DH7QT6a3uJlonU0SqfGY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=LEutK0GsmCpO/79ZyhvUY7xlGTlMAkIpuAItck+V9Dk=; b=Kr6hXH1rkp9sIupO2ZUoUcNINiiyZm5J33Fc1lBS6DhDgjvzBjqDH0Vu8bcIqkfON2 3wMqM1T2ZlgFuyvUh2uSurOtxqAVdoBoPtClFqQj7Pv1JjqtrMzvCiBSzut9EddApZL2 JbiDuJzxsFrkQfJdEuSJJNhQk8fMmp25k3oYSwxzw2erxVC72T06Ow2NX0gTe8gScCBG faoqzWG9opzZc3l6STQsRKFWiDMn6SLSWZBVQfJ3o2AiuXZD4F5gd27IMMrC9vno8MCD QHsA6m/YXxVGxWfyVEeydlIo8fVNz2r+9UluizFkC2bXwX2LvhHmz3Dk0pIpkgRBJEYT 3hMQ== Received: by 10.14.0.3 with SMTP id 3mr2696849eea.16.1355317675403; Wed, 12 Dec 2012 05:07:55 -0800 (PST) Received: from biers.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id r1sm55868541eeo.2.2012.12.12.05.07.54 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 12 Dec 2012 05:07:55 -0800 (PST) From: Daniel Vetter To: DRI Development Date: Wed, 12 Dec 2012 14:07:13 +0100 Message-Id: <1355317637-16742-34-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1355317637-16742-1-git-send-email-daniel.vetter@ffwll.ch> References: <1355317637-16742-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQlVPYYgvvwEUgunjIAtfNoT9i6xB67AZzflcvdwPQ0Aig2QGVbppXFhhDE+yEv3WEV89tK/ Cc: Nouveau Dev , Intel Graphics Development , Radeon Dev , Daniel Vetter Subject: [Intel-gfx] [PATCH 33/37] drm/nouveau: try to protect nbo->pin_refcount X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org ... by moving the bo_pin/bo_unpin manipulation of the pin_refcount under the protection of the ttm reservation lock. pin/unpin seems to get called from all over the place, so atm this is completely racy. After this patch there are only a few places in cleanup functions left which access ->pin_refcount without locking. But I'm hoping that those are safe and some other code invariant guarantees that this won't blow up. In any case, I only need to fix up pin/unpin to make ->pageflip work safely, so let's keep it at that. Add a comment to the header to explain the new locking rule. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/nouveau/nouveau_bo.c | 22 +++++++++++----------- drivers/gpu/drm/nouveau/nouveau_bo.h | 2 ++ 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index 4c950b4..2aa4745 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -300,17 +300,18 @@ nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype) struct ttm_buffer_object *bo = &nvbo->bo; int ret; + ret = ttm_bo_reserve(bo, false, false, false, 0); + if (ret) + goto out; + if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) { NV_ERROR(drm, "bo %p pinned elsewhere: 0x%08x vs 0x%08x\n", bo, 1 << bo->mem.mem_type, memtype); - return -EINVAL; + ret = -EINVAL; + goto out; } if (nvbo->pin_refcnt++) - return 0; - - ret = ttm_bo_reserve(bo, false, false, false, 0); - if (ret) goto out; nouveau_bo_placement_set(nvbo, memtype, 0); @@ -328,10 +329,8 @@ nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype) break; } } - ttm_bo_unreserve(bo); out: - if (unlikely(ret)) - nvbo->pin_refcnt--; + ttm_bo_unreserve(bo); return ret; } @@ -342,13 +341,13 @@ nouveau_bo_unpin(struct nouveau_bo *nvbo) struct ttm_buffer_object *bo = &nvbo->bo; int ret; - if (--nvbo->pin_refcnt) - return 0; - ret = ttm_bo_reserve(bo, false, false, false, 0); if (ret) return ret; + if (--nvbo->pin_refcnt) + goto out; + nouveau_bo_placement_set(nvbo, bo->mem.placement, 0); ret = nouveau_bo_validate(nvbo, false, false, false); @@ -365,6 +364,7 @@ nouveau_bo_unpin(struct nouveau_bo *nvbo) } } +out: ttm_bo_unreserve(bo); return ret; } diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.h b/drivers/gpu/drm/nouveau/nouveau_bo.h index dec51b1..cd5631b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.h +++ b/drivers/gpu/drm/nouveau/nouveau_bo.h @@ -28,6 +28,8 @@ struct nouveau_bo { struct nouveau_drm_tile *tile; struct drm_gem_object *gem; + + /* protect by the ttm reservation lock */ int pin_refcnt; struct ttm_bo_kmap_obj dma_buf_vmap;