Message ID | 1355868794-3708-1-git-send-email-chris@chris-wilson.co.uk (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Tue, Dec 18, 2012 at 10:13:12PM +0000, Chris Wilson wrote: > If the pixel format is not known to the core helpers, it fills in the > fb->bits_per_pixel field as 0. This causes a fatal divide-by-zero OOPS > when we then try to calculate the tiled offset. This would not be a > problem, but that the core helpers do not know about the YUV planar > formats we use for sprites. > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Do we still need this one with the s/fb->bits_per_pixel/pixel_size/ change in one of the later patches? -Daniel > --- > drivers/gpu/drm/i915/intel_display.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 8986172..de09f47 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2019,6 +2019,9 @@ unsigned long intel_gen4_compute_offset_xtiled(int *x, int *y, > { > int tile_rows, tiles; > > + if (bpp == 0) /* XXX unknown pixel format! */ > + return 0; > + > tile_rows = *y / 8; > *y %= 8; > tiles = *x / (512/bpp); > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Tue, 8 Jan 2013 12:13:50 +0100, Daniel Vetter <daniel@ffwll.ch> wrote: > On Tue, Dec 18, 2012 at 10:13:12PM +0000, Chris Wilson wrote: > > If the pixel format is not known to the core helpers, it fills in the > > fb->bits_per_pixel field as 0. This causes a fatal divide-by-zero OOPS > > when we then try to calculate the tiled offset. This would not be a > > problem, but that the core helpers do not know about the YUV planar > > formats we use for sprites. > > > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > > Do we still need this one with the s/fb->bits_per_pixel/pixel_size/ change > in one of the later patches? I don't believe so, we fixed up the only known issue in the sprite code, and for the time being we only have rgb primary display planes. -Chris
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 8986172..de09f47 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2019,6 +2019,9 @@ unsigned long intel_gen4_compute_offset_xtiled(int *x, int *y, { int tile_rows, tiles; + if (bpp == 0) /* XXX unknown pixel format! */ + return 0; + tile_rows = *y / 8; *y %= 8; tiles = *x / (512/bpp);
If the pixel format is not known to the core helpers, it fills in the fb->bits_per_pixel field as 0. This causes a fatal divide-by-zero OOPS when we then try to calculate the tiled offset. This would not be a problem, but that the core helpers do not know about the YUV planar formats we use for sprites. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/intel_display.c | 3 +++ 1 file changed, 3 insertions(+)