From patchwork Wed Dec 19 09:42:39 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 1895061 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 3E22FDF230 for ; Wed, 19 Dec 2012 09:41:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 272BEE5C80 for ; Wed, 19 Dec 2012 01:41:18 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ea0-f181.google.com (mail-ea0-f181.google.com [209.85.215.181]) by gabe.freedesktop.org (Postfix) with ESMTP id 6713BE5C80 for ; Wed, 19 Dec 2012 01:41:08 -0800 (PST) Received: by mail-ea0-f181.google.com with SMTP id k14so686335eaa.12 for ; Wed, 19 Dec 2012 01:41:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=x-received:from:to:cc:subject:date:message-id:x-mailer; bh=G6/+5ZX68qC35/TcS+gDkr5BPkSZrEdvIF43KcuW+VE=; b=GoSdUWa9BAJQvd19WoR+YQhKQXM0oZGQBSEHzZi2HWavauyECpmZqJ+DDP9BpJRL7S tOf1TdOvcvVCMKKtQizhXuXE3jLeeN2zfE4zu5s1qtUnLXdDM8YMROv4ZwuxM+VBSdjq 30LYmHhbw3997iHCKbV7Wh/wUIc29XUT2M500= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer :x-gm-message-state; bh=G6/+5ZX68qC35/TcS+gDkr5BPkSZrEdvIF43KcuW+VE=; b=QYBBGXLUhTjqCC0DJjc9CMz2r1FLl5Equ+5LCYnCypoLsJkpTq0ddeY0e0tK96LLlU tPHyaxg560VO4C8f2neLNP4YyAokNTRFscswbcZzbdOo07QyXeq0TP1LHqijnewufDRn VUKnRfmST2n+nMuQ9/L3ujdUs6nfjTQNWM5N5A69Y8LFrgiZzKHFc3PPZz0NaUrFHggl RNuK1ehcII6cz9zPNU2TnrKv8baXlvLDMA95aIN0V7/Ltkl5O9jxFyleNG5NtHUrbgxQ IKAL4uXDwY5JaCaNuyIISHrCR7MNQLSewKrFGDMV54m8ON3P6wJGuHjts1ZNrcAGu9Bo /d5w== X-Received: by 10.14.173.65 with SMTP id u41mr12953031eel.13.1355910067389; Wed, 19 Dec 2012 01:41:07 -0800 (PST) Received: from phenom.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id 43sm8200020eed.10.2012.12.19.01.41.05 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 19 Dec 2012 01:41:06 -0800 (PST) From: Daniel Vetter To: Intel Graphics Development Date: Wed, 19 Dec 2012 10:42:39 +0100 Message-Id: <1355910159-17380-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.10.4 X-Gm-Message-State: ALoCoQn+OYLHBNDsz42mHSZIZtIuyy3OnM8NV+ZKpwbm+KEpLYBsCW3bz4YoGvmCj4SveXRIIy9/ Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH] drm/i915: tune down WRPLL non-exact clock match note X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org We simply need to switch over to computing those directly, but for now just shut this up. Totally uninteresting for anyone but developers. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58497 Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_ddi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 4bad0f7..a9c7323 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -811,8 +811,8 @@ static void intel_ddi_calculate_wrpll(int clock, int *p, int *n2, int *r2) *r2 = wrpll_tmds_clock_table[i].r2; if (wrpll_tmds_clock_table[i].clock != clock) - DRM_INFO("WRPLL: using settings for %dKHz on %dKHz mode\n", - wrpll_tmds_clock_table[i].clock, clock); + DRM_DEBUG_KMS("WRPLL: using settings for %dKHz on %dKHz mode\n", + wrpll_tmds_clock_table[i].clock, clock); DRM_DEBUG_KMS("WRPLL: %dKHz refresh rate with p=%d, n2=%d r2=%d\n", clock, *p, *n2, *r2);