diff --git a/tests/.gitignore b/tests/.gitignore
index 7e2d901..bd5ab0c 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -85,6 +85,7 @@ prime_nv_test
 prime_self_import
 prime_udl
 testdisplay
+unaligned_tiled_buf
 sysfs_rc6_residency
 sysfs_rps
 # Please keep sorted alphabetically
diff --git a/tests/Makefile.am b/tests/Makefile.am
index d63862a..c28d79a 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -14,6 +14,7 @@ NOUVEAU_TESTS = \
 endif
 
 TESTS_progs_M = \
+	unaligned_tiled_buf \
 	gem_basic \
 	gem_cacheing \
 	gem_cpu_concurrent_blit \
diff --git a/tests/unaligned_tiled_buf.c b/tests/unaligned_tiled_buf.c
new file mode 100644
index 0000000..4b2d666
--- /dev/null
+++ b/tests/unaligned_tiled_buf.c
@@ -0,0 +1,113 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <assert.h>
+#include <inttypes.h>
+#include <errno.h>
+#include <sys/mman.h>
+#include "drm.h"
+#include "i915_drm.h"
+#include "drmtest.h"
+#include "intel_gpu_tools.h"
+
+static void write_buf(int drm_fd, uint32_t handle, unsigned long offset,
+			void *buf, size_t size)
+{
+	uint8_t *p;
+
+	p = gem_mmap__gtt(drm_fd, handle, offset + size, PROT_WRITE);
+	assert(p);
+	memcpy(p + offset, buf, size);
+	munmap(p, offset + size);
+}
+
+static void read_buf(int drm_fd, uint32_t handle, unsigned long offset,
+			void *buf, size_t size)
+{
+	uint8_t *p;
+
+	p = gem_mmap__gtt(drm_fd, handle, offset + size, PROT_READ);
+	assert(p);
+	memcpy(buf, p + offset, size);
+	munmap(p, offset + size);
+}
+
+int main(int argc, char **argv)
+{
+	uint32_t dev_id;
+	uint32_t handle[2];
+	uint8_t *buf;
+	size_t tiled_size;
+	size_t untiled_size;
+	size_t stride;
+	int fd;
+	int gen;
+	int i;
+
+	fd = drm_open_any();
+	dev_id = intel_get_drm_devid(fd);
+
+	stride = 3 * 512;
+	untiled_size = 3 * 4096;		/* tile row size */
+	gen = intel_gen(dev_id);
+	if (gen >= 4)
+		tiled_size = 4 * 4096;
+	else if (gen == 3)
+		tiled_size = 1024 * 1024;
+	else
+		tiled_size = 512 * 1024;
+
+	buf = malloc(tiled_size);
+	assert(buf);
+
+	handle[0] = gem_create(fd, tiled_size);
+	handle[1] = gem_create(fd, untiled_size);
+	assert(handle[0] && handle[1]);
+	gem_set_domain(fd, handle[0], I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+	gem_set_domain(fd, handle[1], I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+
+	gem_set_tiling(fd, handle[0], I915_TILING_X, stride);
+
+	memset(buf, 0x55, tiled_size);
+	/* Make sure the first buffer is bound just before the second one. */
+	write_buf(fd, handle[0], 0, buf, tiled_size);
+	write_buf(fd, handle[1], 0, buf, untiled_size);
+
+	memset(buf, 0xAA, tiled_size);
+	write_buf(fd, handle[0], 0, buf, tiled_size);
+
+	memset(buf, 0, untiled_size);
+	read_buf(fd, handle[1], 0, buf, untiled_size);
+	for (i = 0; i < untiled_size; i++) {
+		if (buf[i] != 0x55) {
+			fprintf(stderr, "corrupted byte at offset %d (%#02x instead of x55)\n",
+				i, buf[i]);
+			exit(EXIT_FAILURE);
+		}
+	}
+
+	return 0;
+}
