From patchwork Tue Jan 8 10:53:12 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 1945251 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id CF0D2DF23A for ; Tue, 8 Jan 2013 10:58:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 696BEE60BB for ; Tue, 8 Jan 2013 02:58:46 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id 65218E6396 for ; Tue, 8 Jan 2013 02:54:37 -0800 (PST) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.73.22; Received: from arrandale.alporthouse.com (unverified [78.156.73.22]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 127585747-1500050 for multiple; Tue, 08 Jan 2013 10:54:23 +0000 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 8 Jan 2013 10:53:12 +0000 Message-Id: <1357642399-7678-5-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1357642399-7678-1-git-send-email-chris@chris-wilson.co.uk> References: <1357642399-7678-1-git-send-email-chris@chris-wilson.co.uk> X-Originating-IP: 78.156.73.22 Subject: [Intel-gfx] [PATCH 04/11] drm/i915: Preferentially allocate mappable GTT space to uncached bo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Both to reduce GTT wastage due to intermingling colouring and to reduce the number of cached bo allocated in the mappable aperture. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c | 13 +++++++++---- drivers/gpu/drm/i915/intel_ringbuffer.c | 13 +++++++++---- 2 files changed, 18 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 8728ca2..b7661e1 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2916,6 +2916,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj, drm_i915_private_t *dev_priv = dev->dev_private; struct drm_mm_node *free_space; u32 size, fence_size, fence_alignment, unfenced_alignment; + unsigned search; bool mappable, fenceable; int ret; @@ -2955,16 +2956,20 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj, i915_gem_object_pin_pages(obj); + search = 0; + if (obj->cache_level != I915_CACHE_NONE && !map_and_fenceable) + search |= DRM_MM_SEARCH_BELOW; + search_free: if (map_and_fenceable) free_space = drm_mm_search_free_in_range_color(&dev_priv->mm.gtt_space, size, alignment, obj->cache_level, 0, dev_priv->mm.gtt_mappable_end, - false); + search); else free_space = drm_mm_search_free_color(&dev_priv->mm.gtt_space, size, alignment, obj->cache_level, - false); + search); if (free_space != NULL) { if (map_and_fenceable) @@ -2972,12 +2977,12 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj, drm_mm_get_block_range_generic(free_space, size, alignment, obj->cache_level, 0, dev_priv->mm.gtt_mappable_end, - 0); + search); else free_space = drm_mm_get_block_generic(free_space, size, alignment, obj->cache_level, - 0); + search); } if (free_space == NULL) { ret = i915_gem_evict_something(dev, size, alignment, diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 42f1a1c..57c6a0f 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -458,10 +458,13 @@ init_pipe_control(struct intel_ring_buffer *ring) i915_gem_object_set_cache_level(obj, I915_CACHE_LLC); - ret = i915_gem_object_pin(obj, 4096, true, false); + ret = i915_gem_object_pin(obj, 4096, false, false); if (ret) goto err_unref; + if (!obj->has_global_gtt_mapping) + i915_gem_gtt_bind_object(obj, obj->cache_level); + pc->gtt_offset = obj->gtt_offset; pc->cpu_page = kmap(sg_page(obj->pages->sgl)); if (pc->cpu_page == NULL) @@ -1104,10 +1107,12 @@ static int init_status_page(struct intel_ring_buffer *ring) i915_gem_object_set_cache_level(obj, I915_CACHE_LLC); - ret = i915_gem_object_pin(obj, 4096, true, false); - if (ret != 0) { + ret = i915_gem_object_pin(obj, 4096, false, false); + if (ret != 0) goto err_unref; - } + + if (!obj->has_global_gtt_mapping) + i915_gem_gtt_bind_object(obj, obj->cache_level); ring->status_page.gfx_addr = obj->gtt_offset; ring->status_page.page_addr = kmap(sg_page(obj->pages->sgl));