| Message ID | 1357934277-3300-9-git-send-email-rodrigo.vivi@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Jan 11, 2013 at 05:57:57PM -0200, Rodrigo Vivi wrote: > PSR must be enabled after transcoder and port are running. > And it is only available for HSW. > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> > --- > drivers/gpu/drm/i915/intel_display.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 1464e47..7e1469a 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3431,8 +3431,13 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) > > intel_crtc_update_cursor(crtc, true); > > - for_each_encoder_on_crtc(dev, crtc, encoder) > + for_each_encoder_on_crtc(dev, crtc, encoder) { > encoder->enable(encoder); > + if (encoder->type == INTEL_OUTPUT_EDP) { > + struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > + intel_edp_enable_psr(intel_dp); > + } This belongs into the dp encoder ->enable/disable callback. Really, I _hate_ such encoder/output special-casing in our crtc code ;-) So we should try to move away from such leaky abstraction, not add more ... -Daniel > + } > > /* > * There seems to be a race in PCH platform hw (at least on some > @@ -3459,8 +3464,14 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) > if (!intel_crtc->active) > return; > > - for_each_encoder_on_crtc(dev, crtc, encoder) > + for_each_encoder_on_crtc(dev, crtc, encoder) { > + if (encoder->type == INTEL_OUTPUT_EDP) { > + struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > + intel_edp_disable_psr(intel_dp); > + } > encoder->disable(encoder); > + } > + > > intel_crtc_wait_for_pending_flips(crtc); > drm_vblank_off(dev, pipe); > -- > 1.7.11.7 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
makes sense... I was in doubt about it and I had tested it already inside ddi_enable... I'm just not sure about having a IS_HASWELL test before calling it... I think this is the safest approach right? On Fri, Jan 11, 2013 at 6:49 PM, Daniel Vetter <daniel@ffwll.ch> wrote: > On Fri, Jan 11, 2013 at 05:57:57PM -0200, Rodrigo Vivi wrote: >> PSR must be enabled after transcoder and port are running. >> And it is only available for HSW. >> >> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> >> --- >> drivers/gpu/drm/i915/intel_display.c | 15 +++++++++++++-- >> 1 file changed, 13 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c >> index 1464e47..7e1469a 100644 >> --- a/drivers/gpu/drm/i915/intel_display.c >> +++ b/drivers/gpu/drm/i915/intel_display.c >> @@ -3431,8 +3431,13 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) >> >> intel_crtc_update_cursor(crtc, true); >> >> - for_each_encoder_on_crtc(dev, crtc, encoder) >> + for_each_encoder_on_crtc(dev, crtc, encoder) { >> encoder->enable(encoder); >> + if (encoder->type == INTEL_OUTPUT_EDP) { >> + struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); >> + intel_edp_enable_psr(intel_dp); >> + } > > This belongs into the dp encoder ->enable/disable callback. Really, I > _hate_ such encoder/output special-casing in our crtc code ;-) So we > should try to move away from such leaky abstraction, not add more ... > -Daniel > >> + } >> >> /* >> * There seems to be a race in PCH platform hw (at least on some >> @@ -3459,8 +3464,14 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) >> if (!intel_crtc->active) >> return; >> >> - for_each_encoder_on_crtc(dev, crtc, encoder) >> + for_each_encoder_on_crtc(dev, crtc, encoder) { >> + if (encoder->type == INTEL_OUTPUT_EDP) { >> + struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); >> + intel_edp_disable_psr(intel_dp); >> + } >> encoder->disable(encoder); >> + } >> + >> >> intel_crtc_wait_for_pending_flips(crtc); >> drm_vblank_off(dev, pipe); >> -- >> 1.7.11.7 >> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch
On Tue, Jan 15, 2013 at 2:25 PM, Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote: > makes sense... I was in doubt about it and I had tested it already > inside ddi_enable... > I'm just not sure about having a IS_HASWELL test before calling it... > I think this is the safest approach right? Atm ddi is hsw-only, so overkill. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1464e47..7e1469a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3431,8 +3431,13 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) intel_crtc_update_cursor(crtc, true); - for_each_encoder_on_crtc(dev, crtc, encoder) + for_each_encoder_on_crtc(dev, crtc, encoder) { encoder->enable(encoder); + if (encoder->type == INTEL_OUTPUT_EDP) { + struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); + intel_edp_enable_psr(intel_dp); + } + } /* * There seems to be a race in PCH platform hw (at least on some @@ -3459,8 +3464,14 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) if (!intel_crtc->active) return; - for_each_encoder_on_crtc(dev, crtc, encoder) + for_each_encoder_on_crtc(dev, crtc, encoder) { + if (encoder->type == INTEL_OUTPUT_EDP) { + struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); + intel_edp_disable_psr(intel_dp); + } encoder->disable(encoder); + } + intel_crtc_wait_for_pending_flips(crtc); drm_vblank_off(dev, pipe);
PSR must be enabled after transcoder and port are running. And it is only available for HSW. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> --- drivers/gpu/drm/i915/intel_display.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-)