| Message ID | 1358251555-19672-1-git-send-email-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Jan 15, 2013 at 12:05:55PM +0000, Chris Wilson wrote: > These are useful for investigating hangs involving WAIT_FOR_EVENT. > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Applied to fixes, with a droplet of future-proofing applied. Thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/i915_debugfs.c | 3 +++ > drivers/gpu/drm/i915/i915_drv.h | 3 +++ > drivers/gpu/drm/i915/i915_irq.c | 11 +++++++++++ > drivers/gpu/drm/i915/i915_reg.h | 2 ++ > 4 files changed, 19 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index fe0b647..769f8be 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -653,6 +653,7 @@ static void i915_ring_error_state(struct seq_file *m, > seq_printf(m, "%s command stream:\n", ring_str(ring)); > seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]); > seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]); > + seq_printf(m, " CTL: 0x%08x\n", error->ctl[ring]); > seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]); > seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]); > seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]); > @@ -705,6 +706,8 @@ static int i915_error_state(struct seq_file *m, void *unused) > seq_printf(m, "EIR: 0x%08x\n", error->eir); > seq_printf(m, "IER: 0x%08x\n", error->ier); > seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); > + seq_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake); > + seq_printf(m, "DERRMR: 0x%08x\n", error->derrmr); > seq_printf(m, "CCID: 0x%08x\n", error->ccid); > > for (i = 0; i < dev_priv->num_fence_regs; i++) > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index bf88e21..9b9f080 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -210,10 +210,13 @@ struct drm_i915_error_state { > u32 pgtbl_er; > u32 ier; > u32 ccid; > + u32 derrmr; > + u32 forcewake; > bool waiting[I915_NUM_RINGS]; > u32 pipestat[I915_MAX_PIPES]; > u32 tail[I915_NUM_RINGS]; > u32 head[I915_NUM_RINGS]; > + u32 ctl[I915_NUM_RINGS]; > u32 ipeir[I915_NUM_RINGS]; > u32 ipehr[I915_NUM_RINGS]; > u32 instdone[I915_NUM_RINGS]; > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 262a29f..a1563bf 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -1182,6 +1182,7 @@ static void i915_record_ring_state(struct drm_device *dev, > error->acthd[ring->id] = intel_ring_get_active_head(ring); > error->head[ring->id] = I915_READ_HEAD(ring); > error->tail[ring->id] = I915_READ_TAIL(ring); > + error->ctl[ring->id] = I915_READ_CTL(ring); > > error->cpu_ring_head[ring->id] = ring->head; > error->cpu_ring_tail[ring->id] = ring->tail; > @@ -1276,6 +1277,16 @@ static void i915_capture_error_state(struct drm_device *dev) > else > error->ier = I915_READ(IER); > > + if (INTEL_INFO(dev)->gen >= 6) > + error->derrmr = I915_READ(DERRMR); > + > + if (IS_VALLEYVIEW(dev)) > + error->forcewake = I915_READ(FORCEWAKE_VLV); > + else if (INTEL_INFO(dev)->gen == 7) > + error->forcewake = I915_READ(FORCEWAKE_MT); > + else if (INTEL_INFO(dev)->gen == 6) > + error->forcewake = I915_READ(FORCEWAKE); > + > for_each_pipe(pipe) > error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index a43bf2b..e79c479 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -515,6 +515,8 @@ > #define GEN7_ERR_INT 0x44040 > #define ERR_INT_MMIO_UNCLAIMED (1<<13) > > +#define DERRMR 0x44050 > + > /* GM45+ chicken bits -- debug workaround bits that may be required > * for various sorts of correct behavior. The top 16 bits of each are > * the enables for writing to the corresponding low bit. > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index fe0b647..769f8be 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -653,6 +653,7 @@ static void i915_ring_error_state(struct seq_file *m, seq_printf(m, "%s command stream:\n", ring_str(ring)); seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]); seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]); + seq_printf(m, " CTL: 0x%08x\n", error->ctl[ring]); seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]); seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]); seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]); @@ -705,6 +706,8 @@ static int i915_error_state(struct seq_file *m, void *unused) seq_printf(m, "EIR: 0x%08x\n", error->eir); seq_printf(m, "IER: 0x%08x\n", error->ier); seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); + seq_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake); + seq_printf(m, "DERRMR: 0x%08x\n", error->derrmr); seq_printf(m, "CCID: 0x%08x\n", error->ccid); for (i = 0; i < dev_priv->num_fence_regs; i++) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index bf88e21..9b9f080 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -210,10 +210,13 @@ struct drm_i915_error_state { u32 pgtbl_er; u32 ier; u32 ccid; + u32 derrmr; + u32 forcewake; bool waiting[I915_NUM_RINGS]; u32 pipestat[I915_MAX_PIPES]; u32 tail[I915_NUM_RINGS]; u32 head[I915_NUM_RINGS]; + u32 ctl[I915_NUM_RINGS]; u32 ipeir[I915_NUM_RINGS]; u32 ipehr[I915_NUM_RINGS]; u32 instdone[I915_NUM_RINGS]; diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 262a29f..a1563bf 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1182,6 +1182,7 @@ static void i915_record_ring_state(struct drm_device *dev, error->acthd[ring->id] = intel_ring_get_active_head(ring); error->head[ring->id] = I915_READ_HEAD(ring); error->tail[ring->id] = I915_READ_TAIL(ring); + error->ctl[ring->id] = I915_READ_CTL(ring); error->cpu_ring_head[ring->id] = ring->head; error->cpu_ring_tail[ring->id] = ring->tail; @@ -1276,6 +1277,16 @@ static void i915_capture_error_state(struct drm_device *dev) else error->ier = I915_READ(IER); + if (INTEL_INFO(dev)->gen >= 6) + error->derrmr = I915_READ(DERRMR); + + if (IS_VALLEYVIEW(dev)) + error->forcewake = I915_READ(FORCEWAKE_VLV); + else if (INTEL_INFO(dev)->gen == 7) + error->forcewake = I915_READ(FORCEWAKE_MT); + else if (INTEL_INFO(dev)->gen == 6) + error->forcewake = I915_READ(FORCEWAKE); + for_each_pipe(pipe) error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a43bf2b..e79c479 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -515,6 +515,8 @@ #define GEN7_ERR_INT 0x44040 #define ERR_INT_MMIO_UNCLAIMED (1<<13) +#define DERRMR 0x44050 + /* GM45+ chicken bits -- debug workaround bits that may be required * for various sorts of correct behavior. The top 16 bits of each are * the enables for writing to the corresponding low bit.
These are useful for investigating hangs involving WAIT_FOR_EVENT. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/i915_debugfs.c | 3 +++ drivers/gpu/drm/i915/i915_drv.h | 3 +++ drivers/gpu/drm/i915/i915_irq.c | 11 +++++++++++ drivers/gpu/drm/i915/i915_reg.h | 2 ++ 4 files changed, 19 insertions(+)