From patchwork Sat Feb 2 12:56:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 2083751 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id F01EFDFE76 for ; Sat, 2 Feb 2013 12:58:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E5D49E5DE1 for ; Sat, 2 Feb 2013 04:58:02 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from oproxy12-pub.bluehost.com (oproxy12-pub.bluehost.com [50.87.16.10]) by gabe.freedesktop.org (Postfix) with SMTP id 0535EE5DC3 for ; Sat, 2 Feb 2013 04:56:41 -0800 (PST) Received: (qmail 17104 invoked by uid 0); 2 Feb 2013 12:56:41 -0000 Received: from unknown (HELO box514.bluehost.com) (74.220.219.114) by oproxy12.bluehost.com with SMTP; 2 Feb 2013 12:56:41 -0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=virtuousgeek.org; s=default; h=References:In-Reply-To:Message-Id:Date:Subject:To:From; bh=+46VpqnnW5UThUyQ8y4PTdFiO9xEIw/5vZ311QvYJ+g=; b=WCglT32DrvB5Wn6CVj9x5XUQqiQFA4MwgeO+AmAi0cG2jr/zKgrK3u3X+EctO/eSW+DzUL+BJcWxcT96KkQICdoNw8zVD0hQouajb6N/dTHaWtm4o+2LfuIf+EZKTuMa; Received: from [151.216.70.136] (port=59537 helo=jbarnes-t420.intel.com) by box514.bluehost.com with esmtpsa (TLSv1:CAMELLIA256-SHA:256) (Exim 4.80) (envelope-from ) id 1U1ce9-0006Th-CB for intel-gfx@lists.freedesktop.org; Sat, 02 Feb 2013 05:56:41 -0700 From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Sat, 2 Feb 2013 13:56:08 +0100 Message-Id: <1359809786-26434-5-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1359809786-26434-1-git-send-email-jbarnes@virtuousgeek.org> References: <1359809786-26434-1-git-send-email-jbarnes@virtuousgeek.org> X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 151.216.70.136 authed with jbarnes@virtuousgeek.org} Subject: [Intel-gfx] [PATCH 04/22] drm/i915: implement WaGTEnableMiFlush on VLV X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org We don't generally use MI_FLUSH these days, but this bit may affect other flushing logic, so set it to be safe. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 2bd074a..5a9e26a 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -511,6 +511,9 @@ static int init_render_ring(struct intel_ring_buffer *ring) I915_WRITE(GFX_MODE_GEN7, _MASKED_BIT_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) | _MASKED_BIT_ENABLE(GFX_REPLAY_MODE)); + if (IS_VALLEYVIEW(dev)) + I915_WRITE(MI_MODE, I915_READ(MI_MODE) | + _MASKED_BIT_ENABLE(MI_FLUSH_ENABLE)); } if (INTEL_INFO(dev)->gen >= 5) {