From patchwork Sun Feb 3 00:07:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 2084901 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 7E6C53FCA4 for ; Sun, 3 Feb 2013 00:10:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 65088E607A for ; Sat, 2 Feb 2013 16:10:01 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from shiva.chad-versace.us (209-20-75-48.static.cloud-ips.com [209.20.75.48]) by gabe.freedesktop.org (Postfix) with ESMTP id DB94FE6236 for ; Sat, 2 Feb 2013 16:08:03 -0800 (PST) Received: by shiva.chad-versace.us (Postfix, from userid 1005) id 707E788121; Sun, 3 Feb 2013 00:11:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on shiva.chad-versace.us X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=ALL_TRUSTED,BAYES_00 autolearn=unavailable version=3.3.2 Received: from lundgren.kumite (c-24-21-100-90.hsd1.or.comcast.net [24.21.100.90]) by shiva.chad-versace.us (Postfix) with ESMTPSA id 3C439884E8; Sun, 3 Feb 2013 00:09:54 +0000 (UTC) From: Ben Widawsky To: intel-gfx@lists.freedesktop.org Date: Sat, 2 Feb 2013 16:07:58 -0800 Message-Id: <1359850082-14793-7-git-send-email-ben@bwidawsk.net> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1359850082-14793-1-git-send-email-ben@bwidawsk.net> References: <1359850082-14793-1-git-send-email-ben@bwidawsk.net> Cc: Ben Widawsky , vincent.beng.keat.cheah@intel.com, alan.previn.teres.alexis@intel.com Subject: [Intel-gfx] [PATCH 06/10] quick_dump: vlv support X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org This patch includes a patch from Jesse which removed a bunch of VLV registers which were useless in my original RFC. Cc: Jesse Barnes Signed-off-by: Ben Widawsky --- tools/quick_dump/Makefile.am | 1 + tools/quick_dump/valleyview | 6 +++ tools/quick_dump/vlv_display.txt | 84 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 91 insertions(+) create mode 100644 tools/quick_dump/valleyview create mode 100644 tools/quick_dump/vlv_display.txt diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am index 0ed28fb..a0c7083 100644 --- a/tools/quick_dump/Makefile.am +++ b/tools/quick_dump/Makefile.am @@ -2,4 +2,5 @@ EXTRA_DIST = \ base_display.txt base_interrupt.txt base_other.txt base_power.txt base_rings.txt \ gen6_other.txt sandybridge \ gen7_other.txt ivybridge \ + vlv_display.txt valleyview \ quick_dump.py diff --git a/tools/quick_dump/valleyview b/tools/quick_dump/valleyview new file mode 100644 index 0000000..2669d92 --- /dev/null +++ b/tools/quick_dump/valleyview @@ -0,0 +1,6 @@ +vlv_display.txt +base_interrupt.txt +base_other.txt +base_power.txt +base_rings.txt +gen7_other.txt diff --git a/tools/quick_dump/vlv_display.txt b/tools/quick_dump/vlv_display.txt new file mode 100644 index 0000000..c785670 --- /dev/null +++ b/tools/quick_dump/vlv_display.txt @@ -0,0 +1,84 @@ +('DPLLA_CRTL', '0x186014', '') +('DPLBA_CRTL', '0x186018', '') +('DPLLAMD_CRTL', '0x18601c', '') +('DPLBAMD_CRTL', '0x186020', '') +('RAWCLK_FREQ', '0x186024', '') +('D_STAT', '0x186104', '') +('DISPCLK_GATE_D', '0x186200', '') +('DPPSR_CGDIS', '0x186204', '') +('RAMCLK_GATE_D', '0x186210', '') +('CPU_VGACNTRL', '0x001c1000', '') +('HTOTAL_A', '0x001e0000', '') +('HBLANK_A', '0x001e0004', '') +('HSYNC_A', '0x001e0008', '') +('VTOTAL_A', '0x001e000c', '') +('VBLANK_A', '0x001e0010', '') +('VSYNC_A', '0x001e0014', '') +('PIPEASRC', '0x001e001c', '') +('VSYNCSHIFT_A', '0x001e0028', '') +('PIPEA_DATA_M1', '0x001e0030', '') +('PIPEA_DATA_N1', '0x001e0034', '') +('PIPEA_DATA_M2', '0x001e0038', '') +('PIPEA_DATA_N2', '0x001e003c', '') +('PIPEA_LINK_M1', '0x001e0040', '') +('PIPEA_LINK_N1', '0x001e0044', '') +('PIPEA_LINK_M2', '0x001e0048', '') +('PIPEA_LINK_N2', '0x001e004c', '') +('HTOTAL_B', '0x001e1000', '') +('HBLANK_B', '0x001e1004', '') +('HSYNC_B', '0x001e1008', '') +('VTOTAL_B', '0x001e100c', '') +('VBLANK_B', '0x001e1010', '') +('VSYNC_B', '0x001e1014', '') +('PIPEBSRC', '0x001e101c', '') +('VSYNCSHIFT_B', '0x001e1028', '') +('PIPEB_DATA_M1', '0x001e1030', '') +('PIPEB_DATA_N1', '0x001e1034', '') +('PIPEB_DATA_M2', '0x001e1038', '') +('PIPEB_DATA_N2', '0x001e103c', '') +('PIPEB_LINK_M1', '0x001e1040', '') +('PIPEB_LINK_N1', '0x001e1044', '') +('PIPEB_LINK_M2', '0x001e1048', '') +('PIPEB_LINK_N2', '0x001e104c', '') +('ADPA', '0x1e1100', '') +('PORT_HOTPLUG_EN', '0x1e1110', '') +('PORT_HOTPLUG_STAT', '0x1e1114', '') +('SDVO_HDMIB', '0x1e1140', '') +('SDVO_DP2', '0x1e1154', '') +('HDMIC', '0x1e1160', '') +('PORT_HOTPLUG_CTRL', '0x1e1164', '') +('DP_B', '0x1e4100', '') +('PIPEACONF', '0x001f0008', '') +('PIPEASTAT', '0x001f0024', '') +('DPINVGTT', '0x001f002c', '') +('DSPARB', '0x001f0030', '') +('FW1', '0x001f0034', '') +('FW2', '0x001f0038', '') +('FW3', '0x001f003c', '') +('FW4', '0x001f0070', '') +('FW5', '0x001f0074', '') +('FW6', '0x001f0078', '') +('FW7', '0x001f007c', '') +('DDL1', '0x001f0050', '') +('DDL2', '0x001f0052', '') +('DSPARB2', '0x001f0060', '') +('DSPHOWM', '0x001f0064', '') +('DSPHOWM1', '0x001f0068', '') +('DSPACNTR', '0x001f0180', '') +('DSPABASE', '0x001f0184', '') +('DSPASTRIDE', '0x001f0188', '') +('DSPASURF', '0x001f019c', '') +('DSPATILEOFF', '0x001f01a4', '') +('PIPEBCONF', '0x001f1008', '') +('PIPEBSTAT', '0x001f1024', '') +('DSPBCNTR', '0x001f1180', '') +('DSPBBASE', '0x001f1184', '') +('DSPBSTRIDE', '0x001f1188', '') +('DSPBSURF', '0x001f119c', '') +('DSPBTILEOFF', '0x001f11a4', '') +('PIPECCONF', '0x001f2008', '') +('DSPCCNTR', '0x001f2180', '') +('DSPCBASE', '0x001f2184', '') +('DSPCSTRIDE', '0x001f2188', '') +('DSPCSURF', '0x001f219c', '') +('DSPCTILEOFF', '0x001f21a4', '')