From patchwork Mon Feb 4 15:27:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lespiau, Damien" X-Patchwork-Id: 2092701 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 63D61DFE82 for ; Mon, 4 Feb 2013 15:36:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 524A3E5F02 for ; Mon, 4 Feb 2013 07:36:28 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id B51FAE5FBF for ; Mon, 4 Feb 2013 07:29:08 -0800 (PST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 04 Feb 2013 07:27:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.84,600,1355126400"; d="scan'208";a="257441635" Received: from unknown (HELO dyon.amr.corp.intel.com) ([10.255.12.132]) by orsmga001.jf.intel.com with ESMTP; 04 Feb 2013 07:29:06 -0800 From: Damien Lespiau To: intel-gfx@lists.freedesktop.org Date: Mon, 4 Feb 2013 15:27:10 +0000 Message-Id: <1359991705-5254-16-git-send-email-damien.lespiau@intel.com> X-Mailer: git-send-email 1.7.7.5 In-Reply-To: <1359991705-5254-1-git-send-email-damien.lespiau@intel.com> References: <1359991705-5254-1-git-send-email-damien.lespiau@intel.com> Subject: [Intel-gfx] [PATCH 15/90] assembler: Rename bits3.id and bits3.fd X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org As always, to sync with mesa. Signed-off-by: Damien Lespiau --- assembler/brw_structs.h | 4 ++-- assembler/disasm.c | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/assembler/brw_structs.h b/assembler/brw_structs.h index 2815256..c442f4a 100644 --- a/assembler/brw_structs.h +++ b/assembler/brw_structs.h @@ -1599,8 +1599,8 @@ struct brw_instruction } generic_gen5; GLuint ud; - GLint id; - GLfloat fd; + GLint d; + GLfloat f; } bits3; char *first_reloc_target, *second_reloc_target; // first for JIP, second for UIP diff --git a/assembler/disasm.c b/assembler/disasm.c index 6260a4e..b6fdc2e 100644 --- a/assembler/disasm.c +++ b/assembler/disasm.c @@ -628,13 +628,13 @@ static int imm (FILE *file, GLuint type, struct brw_instruction *inst) { format (file, "0x%08xUD", inst->bits3.ud); break; case BRW_REGISTER_TYPE_D: - format (file, "%dD", inst->bits3.id); + format (file, "%dD", inst->bits3.d); break; case BRW_REGISTER_TYPE_UW: format (file, "0x%04xUW", (uint16_t) inst->bits3.ud); break; case BRW_REGISTER_TYPE_W: - format (file, "%dW", (int16_t) inst->bits3.id); + format (file, "%dW", (int16_t) inst->bits3.d); break; case BRW_REGISTER_TYPE_UB: format (file, "0x%02xUB", (int8_t) inst->bits3.ud); @@ -646,7 +646,7 @@ static int imm (FILE *file, GLuint type, struct brw_instruction *inst) { format (file, "0x%08xV", inst->bits3.ud); break; case BRW_REGISTER_TYPE_F: - format (file, "%-gF", inst->bits3.fd); + format (file, "%-gF", inst->bits3.f); } return 0; }