From patchwork Mon Feb 4 15:28:14 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lespiau, Damien" X-Patchwork-Id: 2093771 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 2B48C3FD56 for ; Mon, 4 Feb 2013 16:11:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 17F91E5F54 for ; Mon, 4 Feb 2013 08:11:16 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 85463E608F for ; Mon, 4 Feb 2013 07:30:31 -0800 (PST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 04 Feb 2013 07:29:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.84,600,1355126400"; d="scan'208";a="257442471" Received: from unknown (HELO dyon.amr.corp.intel.com) ([10.255.12.132]) by orsmga001.jf.intel.com with ESMTP; 04 Feb 2013 07:30:24 -0800 From: Damien Lespiau To: intel-gfx@lists.freedesktop.org Date: Mon, 4 Feb 2013 15:28:14 +0000 Message-Id: <1359991705-5254-80-git-send-email-damien.lespiau@intel.com> X-Mailer: git-send-email 1.7.7.5 In-Reply-To: <1359991705-5254-1-git-send-email-damien.lespiau@intel.com> References: <1359991705-5254-1-git-send-email-damien.lespiau@intel.com> Subject: [Intel-gfx] [PATCH 79/90] assembler: Use brw_*() functions for 3-src instructions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Signed-off-by: Damien Lespiau --- assembler/gram.y | 79 +++++++++++++++++++---------------------------------- 1 files changed, 28 insertions(+), 51 deletions(-) diff --git a/assembler/gram.y b/assembler/gram.y index 43c34f6..cd42004 100644 --- a/assembler/gram.y +++ b/assembler/gram.y @@ -1086,8 +1086,8 @@ trinaryinstruction: set_instruction_opcode(&$$, $2); set_instruction_saturate(&$$, $4); - GEN(&$$)->header.execution_size = $5; + $6.width = $5; if (set_instruction_dest_three_src(&$$, &$6)) YYERROR; if (set_instruction_src0_three_src(&$$, &$7)) @@ -2916,74 +2916,51 @@ static int set_instruction_src1(struct brw_program_instruction *instr, return 0; } -/* convert 2-src reg type to 3-src reg type - * - * 2-src reg type: - * 000=UD 001=D 010=UW 011=W 100=UB 101=B 110=DF 111=F - * - * 3-src reg type: - * 00=F 01=D 10=UD 11=DF - */ -static int reg_type_2_to_3(int reg_type) -{ - int r = 0; - switch(reg_type) { - case 7: r = 0; break; - case 1: r = 1; break; - case 0: r = 2; break; - // TODO: supporting DF - } - return r; -} - static int set_instruction_dest_three_src(struct brw_program_instruction *instr, struct brw_reg *dest) { - GEN(instr)->bits1.da3src.dest_reg_file = dest->file; - GEN(instr)->bits1.da3src.dest_reg_nr = dest->nr; - GEN(instr)->bits1.da3src.dest_subreg_nr = get_subreg_address(dest->file, dest->type, dest->subnr, dest->address_mode) / 4; // in DWORD - GEN(instr)->bits1.da3src.dest_writemask = dest->dw1.bits.writemask; - GEN(instr)->bits1.da3src.dest_reg_type = reg_type_2_to_3(dest->type); - return 0; + resolve_subnr(dest); + brw_set_3src_dest(&genasm_compile, GEN(instr), *dest); + return 0; } static int set_instruction_src0_three_src(struct brw_program_instruction *instr, struct src_operand *src) { - if (advanced_flag) { - reset_instruction_src_region(GEN(instr), src); - } - // TODO: supporting src0 swizzle, src0 modifier, src0 rep_ctrl - GEN(instr)->bits1.da3src.src_reg_type = reg_type_2_to_3(src->reg.type); - GEN(instr)->bits2.da3src.src0_subreg_nr = get_subreg_address(src->reg.file, src->reg.type, src->reg.subnr, src->reg.address_mode) / 4; // in DWORD - GEN(instr)->bits2.da3src.src0_reg_nr = src->reg.nr; - return 0; + if (advanced_flag) + reset_instruction_src_region(GEN(instr), src); + + resolve_subnr(&src->reg); + + // TODO: src0 modifier, src0 rep_ctrl + brw_set_3src_src0(&genasm_compile, GEN(instr), src->reg); + return 0; } static int set_instruction_src1_three_src(struct brw_program_instruction *instr, struct src_operand *src) { - if (advanced_flag) { - reset_instruction_src_region(GEN(instr), src); - } - // TODO: supporting src1 swizzle, src1 modifier, src1 rep_ctrl - int v = get_subreg_address(src->reg.file, src->reg.type, src->reg.subnr, src->reg.address_mode) / 4; // in DWORD - GEN(instr)->bits2.da3src.src1_subreg_nr_low = v % 4; // lower 2 bits - GEN(instr)->bits3.da3src.src1_subreg_nr_high = v / 4; // highest bit - GEN(instr)->bits3.da3src.src1_reg_nr = src->reg.nr; - return 0; + if (advanced_flag) + reset_instruction_src_region(GEN(instr), src); + + resolve_subnr(&src->reg); + + // TODO: src1 modifier, src1 rep_ctrl + brw_set_3src_src1(&genasm_compile, GEN(instr), src->reg); + return 0; } static int set_instruction_src2_three_src(struct brw_program_instruction *instr, struct src_operand *src) { - if (advanced_flag) { - reset_instruction_src_region(GEN(instr), src); - } - // TODO: supporting src2 swizzle, src2 modifier, src2 rep_ctrl - GEN(instr)->bits3.da3src.src2_subreg_nr = get_subreg_address(src->reg.file, src->reg.type, src->reg.subnr, src->reg.address_mode) / 4; // in DWORD - GEN(instr)->bits3.da3src.src2_reg_nr = src->reg.nr; - return 0; + if (advanced_flag) + reset_instruction_src_region(GEN(instr), src); + + resolve_subnr(&src->reg); + + // TODO: src2 modifier, src2 rep_ctrl + brw_set_3src_src2(&genasm_compile, GEN(instr), src->reg); + return 0; } static void set_instruction_saturate(struct brw_program_instruction *instr,