From patchwork Wed Feb 6 09:31:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 2102851 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id CA478DF2A1 for ; Wed, 6 Feb 2013 09:32:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 63057E673E for ; Wed, 6 Feb 2013 01:32:36 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id 594BDE5C25 for ; Wed, 6 Feb 2013 01:32:07 -0800 (PST) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.73.22; Received: from arrandale.alporthouse.com (unverified [78.156.73.22]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 128708037-1500050 for multiple; Wed, 06 Feb 2013 09:31:55 +0000 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Wed, 6 Feb 2013 09:31:21 +0000 Message-Id: <1360143081-12054-2-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1360143081-12054-1-git-send-email-chris@chris-wilson.co.uk> References: <1360143081-12054-1-git-send-email-chris@chris-wilson.co.uk> X-Originating-IP: 78.156.73.22 Subject: [Intel-gfx] [PATCH 2/2] drm/i915: Discard the unbound list when suspending X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org The unbound tracking of objects is an optimisation to avoid costly domain transfers whilst the system is rendering. Across suspend, the objects will be involuntarily moved out of the GTT domain and will require fixup upon resume. Rather than perform those clflushes for all objects immediately upon resume, just move them out of the unbound tracking list on suspend and lazily reload them from the CPU domain as and when they are used afterwards. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index f6ef53f..db14c73 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3912,6 +3912,17 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj) i915_gem_object_free(obj); } +static void +i915_gem_discard_unbound(struct drm_i915_private *dev_priv) +{ + struct drm_i915_gem_object *obj, *next; + + list_for_each_entry_safe(obj, next, + &dev_priv->mm.unbound_list, + gtt_list) + (void)i915_gem_object_put_pages(obj); +} + int i915_gem_idle(struct drm_device *dev) { @@ -3936,6 +3947,19 @@ i915_gem_idle(struct drm_device *dev) if (!drm_core_check_feature(dev, DRIVER_MODESET)) i915_gem_evict_everything(dev); + /* For KMS we just want to discard the unbound list as it will + * change domains when thawing - and restoring its domain upon + * resume seems like a false optimisation. Also note that discarding + * the unbound list will have the useful side-effect of dropping + * purgeable objects which it seems pointless to restore as they are + * merely a userspace cache. + * However, we may still have some pinned objects (like dma-buf) + * that cannot simply be discarded and will require domain + * restoration upon resume. + */ + if (drm_core_check_feature(dev, DRIVER_MODESET)) + i915_gem_discard_unbound(dev_priv); + i915_gem_reset_fences(dev); /* Hack! Don't let anybody do execbuf while we don't control the chip.