diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am
index 6c04dd5..d898f8e 100644
--- a/tools/quick_dump/Makefile.am
+++ b/tools/quick_dump/Makefile.am
@@ -1,14 +1,18 @@
 BUILT_SOURCES = chipset_wrap_python.c
 
-bin_SCRIPTS = quick_dump.py chipset.py
+bin_SCRIPTS = quick_dump.py chipset.py reg_access.py
 
 lib_LTLIBRARIES = I915ChipsetPython.la
-I915ChipsetPython_la_CFLAGS = -I$(top_srcdir)/lib $(PYTHON_CPPFLAGS)
-I915ChipsetPython_la_LDFLAGS = -module -avoid-version $(PYTHON_LDFLAGS)
-I915ChipsetPython_la_SOURCES = chipset_wrap_python.c intel_chipset.c
+I915ChipsetPython_la_CFLAGS = -I$(top_srcdir)/lib $(PYTHON_CPPFLAGS) $(CFLAGS) -I/usr/include/libdrm/
+I915ChipsetPython_la_LDFLAGS = -module -avoid-version $(PYTHON_LDFLAGS) -lpciaccess
+I915ChipsetPython_la_SOURCES = chipset_wrap_python.c intel_chipset.c \
+			       $(top_srcdir)/lib/intel_drm.c  \
+			       $(top_srcdir)/lib/intel_pci.c  \
+			       $(top_srcdir)/lib/intel_reg_map.c  \
+			       $(top_srcdir)/lib/intel_mmio.c
 
 chipset_wrap_python.c: chipset.i
-	$(SWIG) $(AX_SWIG_PYTHON_OPT) -I$(top_srcdir)/lib -o $@ $<
+	$(SWIG) $(AX_SWIG_PYTHON_OPT) -I/usr/include -I$(top_srcdir)/lib -o $@ $<
 
 all-local: I915ChipsetPython.la
 	$(LN_S) -f .libs/I915ChipsetPython.so _chipset.so
diff --git a/tools/quick_dump/chipset.i b/tools/quick_dump/chipset.i
index 16c4932..2f4f5ef 100644
--- a/tools/quick_dump/chipset.i
+++ b/tools/quick_dump/chipset.i
@@ -1,12 +1,24 @@
-%module chipset 
+%module chipset
+%include "stdint.i"
 %{
+#include <pciaccess.h>
+#include <stdint.h>
 #include "intel_chipset.h"
 extern int is_sandybridge(unsigned short pciid);
 extern int is_ivybridge(unsigned short pciid);
 extern int is_valleyview(unsigned short pciid);
+extern struct pci_device *intel_get_pci_device();
+extern int intel_register_access_init(struct pci_device *pci_dev, int safe);
+extern uint32_t intel_register_read(uint32_t reg);
+extern void intel_register_access_fini();
+extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
 %}
 
-%include "intel_chipset.h"
 extern int is_sandybridge(unsigned short pciid);
 extern int is_ivybridge(unsigned short pciid);
 extern int is_valleyview(unsigned short pciid);
+extern struct pci_device *intel_get_pci_device();
+extern int intel_register_access_init(struct pci_device *pci_dev, int safe);
+extern uint32_t intel_register_read(uint32_t reg);
+extern void intel_register_access_fini();
+extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
diff --git a/tools/quick_dump/intel_chipset.c b/tools/quick_dump/intel_chipset.c
index b242ffc..d6e7f91 100644
--- a/tools/quick_dump/intel_chipset.c
+++ b/tools/quick_dump/intel_chipset.c
@@ -1,3 +1,4 @@
+#include <pciaccess.h>
 #include "intel_chipset.h"
 
 int is_sandybridge(unsigned short pciid)
@@ -14,3 +15,9 @@ int is_valleyview(unsigned short pciid)
 {
 	return IS_VALLEYVIEW(pciid);
 }
+
+/* Simple helper because I couldn't make this work in the script */
+unsigned short pcidev_to_devid(struct pci_device *pdev)
+{
+	return pdev->device_id;
+}
diff --git a/tools/quick_dump/quick_dump.py b/tools/quick_dump/quick_dump.py
index 59cae1f..44aa2ba 100755
--- a/tools/quick_dump/quick_dump.py
+++ b/tools/quick_dump/quick_dump.py
@@ -32,9 +32,8 @@ if args.baseless == False:
 				parse_file(file)
 
 if args.autodetect:
-	sysfs_file = open('/sys/class/drm/card0/device/device', 'r')
-	devid_str = sysfs_file.read()
-	devid = int(devid_str, 16)
+	pci_dev = chipset.intel_get_pci_device()
+	devid = chipset.pcidev_to_devid(pci_dev)
 	if chipset.is_sandybridge(devid):
 		args.profile = open('sandybridge', 'r')
 	elif chipset.is_ivybridge(devid):
diff --git a/tools/quick_dump/reg_access.py b/tools/quick_dump/reg_access.py
new file mode 100755
index 0000000..0f63424
--- /dev/null
+++ b/tools/quick_dump/reg_access.py
@@ -0,0 +1,25 @@
+#!/usr/bin/env python3
+import chipset
+
+def read(reg):
+	reg = int(reg, 16)
+	val = chipset.intel_register_read(reg)
+	return val
+
+def init():
+	pci_dev = chipset.intel_get_pci_device()
+	ret = chipset.intel_register_access_init(pci_dev, 0)
+	if ret != 0:
+		print("Register access init failed");
+		return False
+	return True
+
+if __name__ == "__main__":
+	import sys
+
+	if init() == False:
+		sys.exit()
+
+	reg = sys.argv[1]
+	print(hex(read(reg)))
+	chipset.intel_register_access_fini()
