From patchwork Wed Feb 13 11:32:16 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 2135551 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 1292B3FCA4 for ; Wed, 13 Feb 2013 11:54:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 27257E6639 for ; Wed, 13 Feb 2013 03:54:32 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wi0-f176.google.com (mail-wi0-f176.google.com [209.85.212.176]) by gabe.freedesktop.org (Postfix) with ESMTP id 26F4BE65FC for ; Wed, 13 Feb 2013 03:43:43 -0800 (PST) Received: by mail-wi0-f176.google.com with SMTP id hm14so5561228wib.15 for ; Wed, 13 Feb 2013 03:43:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=FCG0VNT5fU9EqIkMkOHTWbygfvJpT4AZ1pNF2PBhr6k=; b=D3PpuDhB+SAjT3RW1nQGUN0xsQulWxhAJsGyEGHYO5a6RMvzKlOYiigKqdgCW3LT21 gf/4FOyimnufGfSzFHlSGDXYbCKPLURayAflpOpIzZ8V9cWQckFPKviBhHEVcIvn5EIY 4Z6WIqIHZWD7KEWvxV+788LZOGeW3Dhg0rs2c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=FCG0VNT5fU9EqIkMkOHTWbygfvJpT4AZ1pNF2PBhr6k=; b=JBpAj038B7X5rAPv4SwgziwD2ID4UgS+cjq4cnSjk4FglrZw04FPjF2FGl/NAaN0C1 ksHItiQGemP4B81qg+mKRceHAe+Va1fe0ZZ4gohHLq7JHBCKVmsk6P2LYG1r0EaOcRF8 e9TmLdP1W3j0TU5ByZS4zkt7pLK8PtLQGIPoCBU1aazOVRAc5Xz+uk8vB+rpZHlSKNKo USHT3QC7EvHGKPchLBfKNQMUdiSKsi5as2qj8d/J1DqVWwWhTZGC1IpMMkRMlSRHwFwO h0yHBAlW0vwYXQVSDKuZRnFUDhOvXGwd8ckQ4OKHx9f8YNeYmt/MhiK6R7bsbH65iAiM FQZg== X-Received: by 10.180.78.66 with SMTP id z2mr9341513wiw.23.1360755823010; Wed, 13 Feb 2013 03:43:43 -0800 (PST) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id du2sm17597131wib.0.2013.02.13.03.43.41 (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 13 Feb 2013 03:43:42 -0800 (PST) From: Daniel Vetter To: Intel Graphics Development Date: Wed, 13 Feb 2013 12:32:16 +0100 Message-Id: <1360755142-19145-14-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1360755142-19145-1-git-send-email-daniel.vetter@ffwll.ch> References: <1360755142-19145-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQleZ6zLeOSQI5IIi7IEhDn98SQ5SCgVW5+//grj9GJyQeMfBJxQBcdtl5t1GWg+aVhZx+AP Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 13/19] drm/i915: add hw state readout/checking for pipe_config X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org We need to be able to read out the hw state code for a bunch of reasons: - Correctly disabling boot-up/resume state. - Pure paranoia. Since not all of the pipe configuration is e.g. relevant for fastboot (or at least we can allow some wiggle room in some parameters, like the clocks), we need to add a strict_checking parameter to intel_pipe_config_compare for fastboot. For now intel_pipe_config_compare should be fully paranoid and check everything that the hw state readout code supports. Which for this infrastructure code is nothing. I've gone a bit overboard with adding 3 get_pipe_config functions: The ilk version will differ with the next patch, so it's not too onerous. v2: Don't check the hw config if the pipe is off, since an enabled, but dpms off crtc will obviously have tons of difference with the hw state. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_drv.h | 5 +++ drivers/gpu/drm/i915/intel_display.c | 77 +++++++++++++++++++++++++++++++----- 2 files changed, 72 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 1196d0e..561598d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -272,6 +272,7 @@ struct drm_i915_error_state { }; struct intel_crtc_config; +struct intel_crtc; struct drm_i915_display_funcs { bool (*fbc_enabled)(struct drm_device *dev); @@ -285,6 +286,10 @@ struct drm_i915_display_funcs { void (*update_linetime_wm)(struct drm_device *dev, int pipe, struct drm_display_mode *mode); void (*modeset_global_resources)(struct drm_device *dev); + /* Returns the active state of the crtc, and if the crtc is active, + * fills out the pipe-config with the hw state. */ + bool (*get_pipe_config)(struct intel_crtc *, + struct intel_crtc_config *); int (*crtc_mode_set)(struct drm_crtc *crtc, int x, int y, struct drm_framebuffer *old_fb); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f2db90d..865ff6e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4606,6 +4606,20 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, return ret; } +static bool i9xx_get_pipe_config(struct intel_crtc *crtc, + struct intel_crtc_config *pipe_config) +{ + struct drm_device *dev = crtc->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + uint32_t tmp; + + tmp = I915_READ(PIPECONF(crtc->pipe)); + if (!(tmp & PIPECONF_ENABLE)) + return false; + + return true; +} + static void ironlake_init_pch_refclk(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; @@ -5202,7 +5216,6 @@ static void ironlake_fdi_set_m_n(struct drm_crtc *crtc) &intel_crtc->config.adjusted_mode; struct intel_link_m_n m_n = {0}; int target_clock, lane, link_bw; - uint32_t bps; /* FDI is a binary signal running at ~2.7GHz, encoding * each output octet as 10 bits. The actual frequency @@ -5458,6 +5471,20 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, return fdi_config_ok ? ret : -EINVAL; } +static bool ironlake_get_pipe_config(struct intel_crtc *crtc, + struct intel_crtc_config *pipe_config) +{ + struct drm_device *dev = crtc->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + uint32_t tmp; + + tmp = I915_READ(PIPECONF(crtc->pipe)); + if (!(tmp & PIPECONF_ENABLE)) + return false; + + return true; +} + static void haswell_modeset_global_resources(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; @@ -5565,6 +5592,20 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, return ret; } +static bool haswell_get_pipe_config(struct intel_crtc *crtc, + struct intel_crtc_config *pipe_config) +{ + struct drm_device *dev = crtc->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + uint32_t tmp; + + tmp = I915_READ(PIPECONF(crtc->cpu_transcoder)); + if (!(tmp & PIPECONF_ENABLE)) + return false; + + return true; +} + static int intel_crtc_mode_set(struct drm_crtc *crtc, int x, int y, struct drm_framebuffer *fb) @@ -7504,12 +7545,21 @@ intel_modeset_update_state(struct drm_device *dev, unsigned prepare_pipes) base.head) \ if (mask & (1 <<(intel_crtc)->pipe)) \ +static bool +intel_pipe_config_compare(struct intel_crtc_config *current_config, + struct intel_crtc_config *pipe_config) +{ + return true; +} + void intel_modeset_check_state(struct drm_device *dev) { + drm_i915_private_t *dev_priv = dev->dev_private; struct intel_crtc *crtc; struct intel_encoder *encoder; struct intel_connector *connector; + struct intel_crtc_config pipe_config; list_for_each_entry(connector, &dev->mode_config.connector_list, base.head) { @@ -7598,7 +7648,15 @@ intel_modeset_check_state(struct drm_device *dev) "crtc's computed enabled state doesn't match tracked enabled state " "(expected %i, found %i)\n", enabled, crtc->base.enabled); - assert_pipe(dev->dev_private, crtc->pipe, crtc->active); + active = dev_priv->display.get_pipe_config(crtc, + &pipe_config); + WARN(crtc->active != active, + "crtc active state doesn't match with hw state " + "(expected %i, found %i)\n", crtc->active, active); + + WARN(active && + !intel_pipe_config_compare(&crtc->config, &pipe_config), + "pipe state doesn't match!\n"); } } @@ -8411,18 +8469,21 @@ static void intel_init_display(struct drm_device *dev) /* We always want a DPMS function */ if (HAS_DDI(dev)) { + dev_priv->display.get_pipe_config = haswell_get_pipe_config; dev_priv->display.crtc_mode_set = haswell_crtc_mode_set; dev_priv->display.crtc_enable = haswell_crtc_enable; dev_priv->display.crtc_disable = haswell_crtc_disable; dev_priv->display.off = haswell_crtc_off; dev_priv->display.update_plane = ironlake_update_plane; } else if (HAS_PCH_SPLIT(dev)) { + dev_priv->display.get_pipe_config = ironlake_get_pipe_config; dev_priv->display.crtc_mode_set = ironlake_crtc_mode_set; dev_priv->display.crtc_enable = ironlake_crtc_enable; dev_priv->display.crtc_disable = ironlake_crtc_disable; dev_priv->display.off = ironlake_crtc_off; dev_priv->display.update_plane = ironlake_update_plane; } else { + dev_priv->display.get_pipe_config = i9xx_get_pipe_config; dev_priv->display.crtc_mode_set = i9xx_crtc_mode_set; dev_priv->display.crtc_enable = i9xx_crtc_enable; dev_priv->display.crtc_disable = i9xx_crtc_disable; @@ -8940,14 +9001,10 @@ void intel_modeset_setup_hw_state(struct drm_device *dev, } } - for_each_pipe(pipe) { - crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); - - tmp = I915_READ(PIPECONF(crtc->cpu_transcoder)); - if (tmp & PIPECONF_ENABLE) - crtc->active = true; - else - crtc->active = false; + list_for_each_entry(crtc, &dev->mode_config.crtc_list, + base.head) { + crtc->active = dev_priv->display.get_pipe_config(crtc, + &crtc->config); crtc->base.enabled = crtc->active;