From patchwork Wed Feb 13 11:32:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 2135601 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 9D22ADFE75 for ; Wed, 13 Feb 2013 11:56:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 86BA8E6529 for ; Wed, 13 Feb 2013 03:56:59 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id C2C7BE65FC for ; Wed, 13 Feb 2013 03:43:53 -0800 (PST) Received: by mail-we0-f177.google.com with SMTP id d7so918871wer.22 for ; Wed, 13 Feb 2013 03:43:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=s7QKxLugpeGQ7AyXpdn5rIeGTHhCJnxrcNtOV3AZxJQ=; b=cKSbzT0kbsklZkQCgj29u4LlJDc3mcZ+qex3/AfAtm59xQCXiBZ/FHblfbAvIxqUYc u8ewWALfh6Jyppvy/4DOL9a37HanGpeI8SbLDHrgfPHR7xEP84UGb2F8nSJAAQhE+seg LcwIUx6zbcRRxFsFSCmy3cFhHIMnjYe/Ljbew= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=s7QKxLugpeGQ7AyXpdn5rIeGTHhCJnxrcNtOV3AZxJQ=; b=jIE/vTb2mFtZ2AV22CfJIgqY2sHclTKy9KB1NwjMgsX7TZ3GWJ9e0rF5bcZlMK424f i0JZ2SQpR8Ff3DuR99bZFNHCU58o/0DEV5TOlwEGXEJHW6hmvpIyugbxC1lOi68lHhEH QVw9ejqSAlPeklBQ6Cb8PWwZ8kvs8eJnNrjIldrzMsjP69j7iryxR2jQfRfSD65N1EkO CCr4oE8FeiWI0nMRJCxemUpizb1c2rSNZBWL5XbyMdSstOwuoA4Yoda3k7TuKia1xs3X eeG0cYCzahfiNFV7CvbOQI0KUJPR2QWwyrsrC17pJe4p3EW8KRtgIc41RtIRT1fcrV3n mfeg== X-Received: by 10.194.171.198 with SMTP id aw6mr37264446wjc.3.1360755832735; Wed, 13 Feb 2013 03:43:52 -0800 (PST) Received: from wespe.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id du2sm17597131wib.0.2013.02.13.03.43.50 (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 13 Feb 2013 03:43:51 -0800 (PST) From: Daniel Vetter To: Intel Graphics Development Date: Wed, 13 Feb 2013 12:32:21 +0100 Message-Id: <1360755142-19145-19-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1360755142-19145-1-git-send-email-daniel.vetter@ffwll.ch> References: <1360755142-19145-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQmTD5uhaZI/CDTGD5pTfk6XTElDcKIuGIg+nNBCUtLfLA5R5frQiGVgvJNxdHz8ZU8UOvMY Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 18/19] drm/i915: add pipe_config->limited_color_range X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Now that we have a useful struct for this, let's use it. Some neat pointer-chasing required, but it's all there already. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_dp.c | 2 +- drivers/gpu/drm/i915/intel_drv.h | 8 ++++++-- drivers/gpu/drm/i915/intel_hdmi.c | 5 +++-- drivers/gpu/drm/i915/intel_sdvo.c | 5 +++-- 5 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0b961f6..98abd75 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4880,7 +4880,7 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc, else val |= PIPECONF_PROGRESSIVE; - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE) + if (intel_crtc->config.limited_color_range) val |= PIPECONF_COLOR_RANGE_SELECT; else val &= ~PIPECONF_COLOR_RANGE_SELECT; diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 69f022c..dbc3b86 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -832,7 +832,7 @@ found: } if (intel_dp->color_range) - adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE; + pipe_config->limited_color_range = true; intel_dp->link_bw = bws[clock]; intel_dp->lane_count = lane_count; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 67c5062..987679b 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -101,8 +101,6 @@ #define INTEL_DVO_CHIP_TMDS 2 #define INTEL_DVO_CHIP_TVOUT 4 -#define INTEL_MODE_LIMITED_COLOR_RANGE (0x40) - struct intel_framebuffer { struct drm_framebuffer base; struct drm_i915_gem_object *obj; @@ -191,6 +189,12 @@ struct intel_crtc_config { bool has_dp_encoder; bool dither; + /* + * Use reduced/limited/broadcast rbg range, compressing from the full + * range fed into the crtcs. + */ + bool limited_color_range; + /* Controls for the clock computation, to override various stages. */ bool clock_set; diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index abe4abd..c92e73c 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -332,6 +332,7 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder, struct drm_display_mode *adjusted_mode) { struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); + struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); struct dip_infoframe avi_if = { .type = DIP_TYPE_AVI, .ver = DIP_VERSION_AVI, @@ -342,7 +343,7 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder, avi_if.body.avi.YQ_CN_PR |= DIP_AVI_PR_2; if (intel_hdmi->rgb_quant_range_selectable) { - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE) + if (intel_crtc->config.limited_color_range) avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED; else avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL; @@ -792,7 +793,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder, } if (intel_hdmi->color_range) - adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE; + pipe_config->limited_color_range = true; if (HAS_PCH_SPLIT(dev) && !IS_HASWELL(dev)) pipe_config->has_pch_encoder = true; diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 5e3dfe8..1e13398 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c @@ -956,9 +956,10 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo, .len = DIP_LEN_AVI, }; uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; + struct intel_crtc *intel_crtc = to_intel_crtc(intel_sdvo->base.base.crtc); if (intel_sdvo->rgb_quant_range_selectable) { - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE) + if (intel_crtc->config.limited_color_range) avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED; else avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL; @@ -1090,7 +1091,7 @@ static bool intel_sdvo_compute_config(struct intel_encoder *encoder, } if (intel_sdvo->color_range) - adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE; + pipe_config->limited_color_range = true; return true; }