From patchwork Wed Feb 13 21:20:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrik Jakobsson X-Patchwork-Id: 2142581 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 63AF0DF283 for ; Thu, 14 Feb 2013 18:46:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4DDAFE6A6A for ; Thu, 14 Feb 2013 10:46:14 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-la0-f50.google.com (mail-la0-f50.google.com [209.85.215.50]) by gabe.freedesktop.org (Postfix) with ESMTP id 034CBE682B; Wed, 13 Feb 2013 13:22:49 -0800 (PST) Received: by mail-la0-f50.google.com with SMTP id ec20so1612876lab.23 for ; Wed, 13 Feb 2013 13:22:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=58b2jJTObfpYWbJl+7qo3Oyb02eiE9nfHHGQoLn3pgs=; b=yW7ocBx/OTxWXmgmYFBr6kOebZoJc4jzVP57uR2vkY8cFyhHAycJgshUJTSVVpJtNh pRldgH1Zcv0gcglz1uQg97wShwT/uDZZ9Z3BZ5MBPbZAOeaFUF6Ap+WOEbgwAha3bYAL KyWa+9cfZASu0xePqDGYQ3XDzpMVqRkibjOiQqpSqau4DJ22SXYs//HaAE+XmL4kQ2U6 a9Q1Ar8L90KpBITTgQU17FU1Cd4UoDT0VJMeiMsoP6pSgSqi0DxPzx08mzn+Ap0b/MiU aVMKB+jB51HTjeMek7hcx6lV9R2R+5CSm0gBiYeIv/OfGKcmzOd44zwkdsVM02hg3OCR L1tQ== X-Received: by 10.152.109.112 with SMTP id hr16mr18490408lab.38.1360790568581; Wed, 13 Feb 2013 13:22:48 -0800 (PST) Received: from patrik-macbook.lan (h138n8-oer-a32.ias.bredband.telia.com. [2.248.103.138]) by mx.google.com with ESMTPS id f4sm6380866lbo.4.2013.02.13.13.22.47 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 13 Feb 2013 13:22:47 -0800 (PST) From: Patrik Jakobsson To: dri-devel@lists.freedesktop.org Date: Wed, 13 Feb 2013 22:20:22 +0100 Message-Id: <1360790422-6935-2-git-send-email-patrik.r.jakobsson@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1360790422-6935-1-git-send-email-patrik.r.jakobsson@gmail.com> References: <1360790422-6935-1-git-send-email-patrik.r.jakobsson@gmail.com> X-Mailman-Approved-At: Thu, 14 Feb 2013 10:45:27 -0800 Cc: daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH] drm/i915: Set i9xx sdvo clock limits according to specifications X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org The Intel PRM says the M1 and M2 divisors must be in the range of 10-20 and 5-9. Since we do all calculations based on them being register values (which are subtracted by 2) we need to specify them accordingly. Signed-off-by: Patrik Jakobsson Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 4f6c594..458dfd9 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -154,8 +154,8 @@ static const intel_limit_t intel_limits_i9xx_sdvo = { .vco = { .min = 1400000, .max = 2800000 }, .n = { .min = 1, .max = 6 }, .m = { .min = 70, .max = 120 }, - .m1 = { .min = 10, .max = 22 }, - .m2 = { .min = 5, .max = 9 }, + .m1 = { .min = 8, .max = 18 }, + .m2 = { .min = 3, .max = 7 }, .p = { .min = 5, .max = 80 }, .p1 = { .min = 1, .max = 8 }, .p2 = { .dot_limit = 200000,