@@ -5382,9 +5382,13 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
if (!(tmp & PIPECONF_ENABLE))
return false;
- if (I915_READ(TRANSCONF(crtc->pipe)) & TRANS_ENABLE)
+ if (I915_READ(TRANSCONF(crtc->pipe)) & TRANS_ENABLE) {
pipe_config->has_pch_encoder = true;
+ tmp = I915_READ(FDI_RX_CTL(crtc->pipe));
+ pipe_config->fdi_lanes = ((tmp >> 19) & 0x3) + 1;
+ }
+
return true;
}
@@ -5509,9 +5513,13 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
*/
tmp = I915_READ(TRANS_DDI_FUNC_CTL(crtc->pipe));
if ((tmp & TRANS_DDI_PORT_MASK) == TRANS_DDI_SELECT_PORT(PORT_E) &&
- I915_READ(TRANSCONF(PIPE_A)) & TRANS_ENABLE)
+ I915_READ(TRANSCONF(PIPE_A)) & TRANS_ENABLE) {
pipe_config->has_pch_encoder = true;
+ tmp = I915_READ(FDI_RX_CTL(PIPE_A));
+ pipe_config->fdi_lanes = ((tmp >> 19) & 0x3) + 1;
+ }
+
return true;
}
@@ -7469,6 +7477,14 @@ intel_pipe_config_compare(struct intel_crtc_config *current_config,
return false;
}
+ if (current_config->fdi_lanes != pipe_config->fdi_lanes) {
+ DRM_ERROR("mismatch in fdi_lanes "
+ "(expected %i, found %i)\n",
+ current_config->fdi_lanes,
+ pipe_config->fdi_lanes);
+ return false;
+ }
+
return true;
}