From patchwork Mon Feb 25 23:13:41 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 2183181 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 41D7DDF230 for ; Mon, 25 Feb 2013 23:16:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 40998E6053 for ; Mon, 25 Feb 2013 15:16:59 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ye0-f170.google.com (mail-ye0-f170.google.com [209.85.213.170]) by gabe.freedesktop.org (Postfix) with ESMTP id 0CA0EE5FF7 for ; Mon, 25 Feb 2013 15:14:08 -0800 (PST) Received: by mail-ye0-f170.google.com with SMTP id r5so539963yen.29 for ; Mon, 25 Feb 2013 15:14:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=dAVkl7SAmdtRWhZYY/J4bZRo5SsO/+JratElgLVGOOU=; b=ntaYXymSjPn2Vflov4J9zNL3rwTaWx1uEcNak/b7TJdBUj81WIrOXQ6Ai0JB+lGG+r 70vtzMFJp9aI4c5p3vnZCVznTVrwTsJtZHVC375AQyVMneDDCyVNhwHpOGxzImnScT4f Npsb4R8+TdhPr/s/cX8S/0C1anBoKNvthA6Xb0jj/F3ig15jGHcHkhBSnMh8PQyz3FQY 2T7MqA7mzLmXxAwqEvGJMr4V4LmZ+BsA5LYq8zCba8o3uXfrSaifaWyt7M7KZk9opao+ Br4LdTIMZCx+FDfAwLaobu5E0oAQGUxvi78W6RdxuRYLlxUtQoiJZjHWvkLPpc8382un 4vBA== X-Received: by 10.236.180.42 with SMTP id i30mr21236193yhm.68.1361834048542; Mon, 25 Feb 2013 15:14:08 -0800 (PST) Received: from localhost.localdomain ([186.204.164.107]) by mx.google.com with ESMTPS id t5sm15342834anl.22.2013.02.25.15.14.05 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 25 Feb 2013 15:14:07 -0800 (PST) From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Mon, 25 Feb 2013 20:13:41 -0300 Message-Id: <1361834023-30062-5-git-send-email-rodrigo.vivi@gmail.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1361834023-30062-1-git-send-email-rodrigo.vivi@gmail.com> References: <1361834023-30062-1-git-send-email-rodrigo.vivi@gmail.com> Subject: [Intel-gfx] [PATCH 4/6] drm/i915: HSW PM - removing pcode read/write. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Yet according to pm spec pcode read/write operations aren't necessary for HSW. Signed-off-by: Rodrigo Vivi Reviewed-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_pm.c | 26 -------------------------- 1 file changed, 26 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 322c562..761be6f 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2749,18 +2749,6 @@ static void hsw_enable_rps(struct drm_device *dev) GEN6_RP_UP_BUSY_AVG | GEN7_RP_DOWN_IDLE_AVG); - ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_MIN_FREQ_TABLE, 0); - if (!ret) { - pcu_mbox = 0; - ret = sandybridge_pcode_read(dev_priv, GEN6_READ_OC_PARAMS, &pcu_mbox); - if (ret && pcu_mbox & (1<<31)) { /* OC supported */ - dev_priv->rps.max_delay = pcu_mbox & 0xff; - DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max to %dMHz\n", pcu_mbox * 50); - } - } else { - DRM_DEBUG_DRIVER("Failed to set the min frequency\n"); - } - gen6_set_rps(dev_priv->dev, (gt_perf_status & 0xff00) >> 8); /* requires MSI enabled */ @@ -2772,20 +2760,6 @@ static void hsw_enable_rps(struct drm_device *dev) /* enable all PM interrupts */ I915_WRITE(GEN6_PMINTRMSK, 0); - rc6vids = 0; - ret = sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids); - if (IS_GEN6(dev) && ret) { - DRM_DEBUG_DRIVER("Couldn't check for BIOS workaround\n"); - } else if (IS_GEN6(dev) && (GEN6_DECODE_RC6_VID(rc6vids & 0xff) < 450)) { - DRM_DEBUG_DRIVER("You should update your BIOS. Correcting minimum rc6 voltage (%dmV->%dmV)\n", - GEN6_DECODE_RC6_VID(rc6vids & 0xff), 450); - rc6vids &= 0xffff00; - rc6vids |= GEN6_ENCODE_RC6_VID(450); - ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_RC6VIDS, rc6vids); - if (ret) - DRM_ERROR("Couldn't fix incorrect rc6 voltage\n"); - } - gen6_gt_force_wake_put(dev_priv); }