From patchwork Mon Feb 25 23:13:42 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 2183191 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 569E8DF230 for ; Mon, 25 Feb 2013 23:17:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 52354E6033 for ; Mon, 25 Feb 2013 15:17:30 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-gg0-f172.google.com (mail-gg0-f172.google.com [209.85.161.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 89A6BE5FB1 for ; Mon, 25 Feb 2013 15:14:11 -0800 (PST) Received: by mail-gg0-f172.google.com with SMTP id f4so600034ggn.31 for ; Mon, 25 Feb 2013 15:14:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=vEXEElySPGR62zSb2EByEpYvABHHT+HDNrs5brlooyw=; b=hxSjc3bvWln1T/I3M0+vqef2q5UWNzpbLOGcSVsk+qKZos9rdSN602P9tGHtPk37hw nO9oZlmjPxbODPqUWSriMHuvrK0SnVtGEffHuUJxgDct/asUyhYs6tXyKZmgSN9lf4I6 rr6hGPNY4Ncbii/Meueb7D9PYribHO8X57Ije/tM3UxuQVKyjI6ulVf/+AiJIUauqJEE A1zkorYwLhXpio4Wkwn7NRAtttCpPLO/q1M2ilwX8ZRSyECfkwPU+Mau1mNLOfYrESk1 nRSJdqbbDyjbtCsUwEuuFttArAJ0NtxA9C9r253nmUJTghIulzx87Nqj537UB1qILqTG EJwg== X-Received: by 10.236.135.80 with SMTP id t56mr21159608yhi.126.1361834050607; Mon, 25 Feb 2013 15:14:10 -0800 (PST) Received: from localhost.localdomain ([186.204.164.107]) by mx.google.com with ESMTPS id t5sm15342834anl.22.2013.02.25.15.14.08 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 25 Feb 2013 15:14:09 -0800 (PST) From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Mon, 25 Feb 2013 20:13:42 -0300 Message-Id: <1361834023-30062-6-git-send-email-rodrigo.vivi@gmail.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1361834023-30062-1-git-send-email-rodrigo.vivi@gmail.com> References: <1361834023-30062-1-git-send-email-rodrigo.vivi@gmail.com> Subject: [Intel-gfx] [PATCH 5/6] drm/i915: Use all PM deferred events for HSW. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_reg.h | 7 +++++++ drivers/gpu/drm/i915/intel_pm.c | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ef47cee..7977b65 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4258,6 +4258,13 @@ #define GEN6_PM_DEFERRED_EVENTS (GEN6_PM_RP_UP_THRESHOLD | \ GEN6_PM_RP_DOWN_THRESHOLD | \ GEN6_PM_RP_DOWN_TIMEOUT) +#define GEN7_PM_DEFERRED_EVENTS (GEN6_PM_MBOX_EVENT | \ + GEN6_PM_THERMAL_EVENT | \ + GEN6_PM_RP_DOWN_TIMEOUT | \ + GEN6_PM_RP_UP_THRESHOLD | \ + GEN6_PM_RP_DOWN_THRESHOLD | \ + GEN6_PM_RP_UP_EI_EXPIRED | \ + GEN6_PM_RP_DOWN_EI_EXPIRED) #define GEN6_GT_GFX_RC6_LOCKED 0x138104 #define GEN6_GT_GFX_RC6 0x138108 diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 761be6f..d43e011 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2752,7 +2752,7 @@ static void hsw_enable_rps(struct drm_device *dev) gen6_set_rps(dev_priv->dev, (gt_perf_status & 0xff00) >> 8); /* requires MSI enabled */ - I915_WRITE(GEN6_PMIER, GEN6_PM_DEFERRED_EVENTS); + I915_WRITE(GEN6_PMIER, GEN7_PM_DEFERRED_EVENTS); spin_lock_irq(&dev_priv->rps.lock); WARN_ON(dev_priv->rps.pm_iir != 0); I915_WRITE(GEN6_PMIMR, 0);