From patchwork Tue Feb 26 11:05:14 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kuoppala X-Patchwork-Id: 2185081 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id C8E183FCF2 for ; Tue, 26 Feb 2013 11:09:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9FB91E6448 for ; Tue, 26 Feb 2013 03:09:06 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 512C4E6422 for ; Tue, 26 Feb 2013 03:02:41 -0800 (PST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 26 Feb 2013 03:02:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.84,739,1355126400"; d="scan'208";a="296016453" Received: from rosetta.fi.intel.com (HELO rosetta) ([10.237.72.51]) by fmsmga002.fm.intel.com with ESMTP; 26 Feb 2013 03:02:23 -0800 Received: by rosetta (Postfix, from userid 1000) id 32E76800E5; Tue, 26 Feb 2013 13:05:20 +0200 (EET) From: Mika Kuoppala To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Feb 2013 13:05:14 +0200 Message-Id: <1361876716-8625-12-git-send-email-mika.kuoppala@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1361876716-8625-1-git-send-email-mika.kuoppala@intel.com> References: <1361876716-8625-1-git-send-email-mika.kuoppala@intel.com> Subject: [Intel-gfx] [PATCH 11/13] drm/i915: add batch object and context to i915_add_request() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org In order to track down a batch buffer and context which caused the ring to hang, store reference to bo and context into the request struct. Request can also cause gpu to hang after the batch in the flush section in the ring. To detect this add start of the flush portion offset into the request. Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_drv.h | 11 +++++++++-- drivers/gpu/drm/i915/i915_gem.c | 12 ++++++++---- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 7 ++++--- drivers/gpu/drm/i915/intel_overlay.c | 5 +++-- drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +- 5 files changed, 25 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 2cc5817..9361b2e 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1241,9 +1241,15 @@ struct drm_i915_gem_request { /** GEM sequence number associated with this request. */ uint32_t seqno; - /** Postion in the ringbuffer of the end of the request */ + /** Position in the ringbuffer of the start of the request */ + u32 head; + + /** Position in the ringbuffer of the end of the request */ u32 tail; + /** Batch buffer related to this request if any */ + struct drm_i915_gem_object *batch_obj; + /** Context related to this request */ struct i915_hw_context *ctx; @@ -1639,7 +1645,8 @@ int __must_check i915_gem_idle(struct drm_device *dev); int i915_add_request(struct intel_ring_buffer *ring, struct drm_file *file, u32 *seqno, - struct i915_hw_context *ctx); + struct i915_hw_context *ctx, + struct drm_i915_gem_object *batch_obj); int __must_check i915_wait_seqno(struct intel_ring_buffer *ring, uint32_t seqno); int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 850b1bb..ace482d 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -967,7 +967,7 @@ i915_gem_check_olr(struct intel_ring_buffer *ring, u32 seqno) ret = 0; if (seqno == ring->outstanding_lazy_request) - ret = i915_add_request(ring, NULL, NULL, NULL); + ret = i915_add_request(ring, NULL, NULL, NULL, NULL); return ret; } @@ -1998,14 +1998,16 @@ int i915_add_request(struct intel_ring_buffer *ring, struct drm_file *file, u32 *out_seqno, - struct i915_hw_context *ctx) + struct i915_hw_context *ctx, + struct drm_i915_gem_object *obj) { drm_i915_private_t *dev_priv = ring->dev->dev_private; struct drm_i915_gem_request *request; - u32 request_ring_position; + u32 request_ring_position, request_start; int was_empty; int ret; + request_start = intel_ring_get_tail(ring); /* * Emit any outstanding flushes - execbuf can fail to emit the flush * after having emitted the batchbuffer command. Hence we need to fix @@ -2037,7 +2039,9 @@ i915_add_request(struct intel_ring_buffer *ring, request->seqno = intel_ring_get_seqno(ring); request->ring = ring; + request->head = request_start; request->tail = request_ring_position; + request->batch_obj = obj; request->ctx = ctx; if (request->ctx) @@ -2276,7 +2280,7 @@ i915_gem_retire_work_handler(struct work_struct *work) idle = true; for_each_ring(ring, dev_priv, i) { if (ring->gpu_caches_dirty) - i915_add_request(ring, NULL, NULL, NULL); + i915_add_request(ring, NULL, NULL, NULL, NULL); idle &= list_empty(&ring->request_list); } diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index b1e54d5..710784d 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -790,13 +790,14 @@ static void i915_gem_execbuffer_retire_commands(struct drm_device *dev, struct drm_file *file, struct intel_ring_buffer *ring, - struct i915_hw_context *ctx) + struct i915_hw_context *ctx, + struct drm_i915_gem_object *obj) { /* Unconditionally force add_request to emit a full flush. */ ring->gpu_caches_dirty = true; /* Add a breadcrumb for the completion of the batch buffer */ - (void)i915_add_request(ring, file, NULL, ctx); + (void)i915_add_request(ring, file, NULL, ctx, obj); } static int @@ -1070,7 +1071,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags); i915_gem_execbuffer_move_to_active(&eb->objects, ring); - i915_gem_execbuffer_retire_commands(dev, file, ring, ctx); + i915_gem_execbuffer_retire_commands(dev, file, ring, ctx, batch_obj); err: eb_destroy(eb); diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index 540be47..125b6fc 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -217,7 +217,7 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay, int ret; BUG_ON(overlay->last_flip_req); - ret = i915_add_request(ring, NULL, &overlay->last_flip_req, NULL); + ret = i915_add_request(ring, NULL, &overlay->last_flip_req, NULL, NULL); if (ret) return ret; @@ -286,7 +286,8 @@ static int intel_overlay_continue(struct intel_overlay *overlay, intel_ring_emit(ring, flip_addr); intel_ring_advance(ring); - return i915_add_request(ring, NULL, &overlay->last_flip_req, NULL); + return i915_add_request(ring, NULL, &overlay->last_flip_req, + NULL, NULL); } static void intel_overlay_release_old_vid_tail(struct intel_overlay *overlay) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 559d3e5..355291a 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -1423,7 +1423,7 @@ int intel_ring_idle(struct intel_ring_buffer *ring) /* We need to add any requests required to flush the objects and ring */ if (ring->outstanding_lazy_request) { - ret = i915_add_request(ring, NULL, NULL, NULL); + ret = i915_add_request(ring, NULL, NULL, NULL, NULL); if (ret) return ret; }