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[14/15] drm/i915: check the power well on i915_pipe_enabled

Message ID 1362611003-4823-15-git-send-email-przanoni@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Paulo Zanoni March 6, 2013, 11:03 p.m. UTC 
From: Paulo Zanoni <paulo.r.zanoni@intel.com>

This fixes "unclaimed register" messages when the power well is
disabled and there's a GPU hang.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c |    3 +++
 1 file changed, 3 insertions(+)

Comments

Ben Widawsky March 15, 2013, 9:06 p.m. UTC | #1 
On Wed, Mar 06, 2013 at 08:03:21PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> This fixes "unclaimed register" messages when the power well is
> disabled and there's a GPU hang.

This is really beginning to smell like we need special display register
reads which can do the check below.

> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

> ---
>  drivers/gpu/drm/i915/i915_irq.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 29b1bb1..aefc674 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -129,6 +129,9 @@ i915_pipe_enabled(struct drm_device *dev, int pipe)
>  	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
>  								      pipe);
>  
> +	if (intel_power_well_is_down(dev) && cpu_transcoder != TRANSCODER_EDP)
> +		return false;
> +
>  	return I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE;
>  }
>  
> -- 
> 1.7.10.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Daniel Vetter March 17, 2013, 8:55 p.m. UTC | #2 
On Wed, Mar 06, 2013 at 08:03:21PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> This fixes "unclaimed register" messages when the power well is
> disabled and there's a GPU hang.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 29b1bb1..aefc674 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -129,6 +129,9 @@ i915_pipe_enabled(struct drm_device *dev, int pipe)
>  	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
>  								      pipe);
>  
> +	if (intel_power_well_is_down(dev) && cpu_transcoder != TRANSCODER_EDP)
> +		return false;
> +
>  	return I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE;

Again I vote for I915_READ_NOCHECK instead.
-Daniel
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 29b1bb1..aefc674 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -129,6 +129,9 @@  i915_pipe_enabled(struct drm_device *dev, int pipe)
 	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
 								      pipe);
 
+	if (intel_power_well_is_down(dev) && cpu_transcoder != TRANSCODER_EDP)
+		return false;
+
 	return I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE;
 }