diff mbox

[17/20] drm/i915: don't use plane pipe select on VLV

Message ID 1362768363-3710-17-git-send-email-jbarnes@virtuousgeek.org (mailing list archive)
State New, archived
Headers show

Commit Message

Jesse Barnes March 8, 2013, 6:46 p.m. UTC
Planes are fixed to pipes in VLV.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_display.c |   12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

Comments

Ville Syrjälä March 19, 2013, 11:59 a.m. UTC | #1
On Fri, Mar 08, 2013 at 10:46:00AM -0800, Jesse Barnes wrote:
> Planes are fixed to pipes in VLV.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c |   12 +++++++-----
>  1 file changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index f1d6404..5e338c6 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1272,7 +1272,7 @@ static void assert_planes_disabled(struct drm_i915_private *dev_priv,
>  	int cur_pipe;
>  
>  	/* Planes are fixed to pipes on ILK+ */
> -	if (HAS_PCH_SPLIT(dev_priv->dev)) {
> +	if (HAS_PCH_SPLIT(dev_priv->dev) || IS_VALLEYVIEW(dev_priv->dev)) {
>  		reg = DSPCNTR(pipe);
>  		val = I915_READ(reg);
>  		WARN((val & DISPLAY_PLANE_ENABLE),
> @@ -4872,10 +4872,12 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
>  	/* Set up the display plane register */
>  	dspcntr = DISPPLANE_GAMMA_ENABLE;
>  
> -	if (pipe == 0)
> -		dspcntr &= ~DISPPLANE_SEL_PIPE_MASK;
> -	else
> -		dspcntr |= DISPPLANE_SEL_PIPE_B;
> +	if (!IS_VALLEYVIEW(dev)) {
> +		if (pipe == 0)
> +			dspcntr &= ~DISPPLANE_SEL_PIPE_MASK;
> +		else
> +			dspcntr |= DISPPLANE_SEL_PIPE_B;
> +	}
>  
>  	if (pipe == 0 && INTEL_INFO(dev)->gen < 4) {
>  		/* Enable pixel doubling when the dot clock is > 90% of the (display)
> -- 
> 1.7.10.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Daniel Vetter March 19, 2013, 7:05 p.m. UTC | #2
On Tue, Mar 19, 2013 at 01:59:57PM +0200, Ville Syrjälä wrote:
> On Fri, Mar 08, 2013 at 10:46:00AM -0800, Jesse Barnes wrote:
> > Planes are fixed to pipes in VLV.
> > 
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Queued for -next, thanks for the patch.
-Daniel
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f1d6404..5e338c6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1272,7 +1272,7 @@  static void assert_planes_disabled(struct drm_i915_private *dev_priv,
 	int cur_pipe;
 
 	/* Planes are fixed to pipes on ILK+ */
-	if (HAS_PCH_SPLIT(dev_priv->dev)) {
+	if (HAS_PCH_SPLIT(dev_priv->dev) || IS_VALLEYVIEW(dev_priv->dev)) {
 		reg = DSPCNTR(pipe);
 		val = I915_READ(reg);
 		WARN((val & DISPLAY_PLANE_ENABLE),
@@ -4872,10 +4872,12 @@  static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
 	/* Set up the display plane register */
 	dspcntr = DISPPLANE_GAMMA_ENABLE;
 
-	if (pipe == 0)
-		dspcntr &= ~DISPPLANE_SEL_PIPE_MASK;
-	else
-		dspcntr |= DISPPLANE_SEL_PIPE_B;
+	if (!IS_VALLEYVIEW(dev)) {
+		if (pipe == 0)
+			dspcntr &= ~DISPPLANE_SEL_PIPE_MASK;
+		else
+			dspcntr |= DISPPLANE_SEL_PIPE_B;
+	}
 
 	if (pipe == 0 && INTEL_INFO(dev)->gen < 4) {
 		/* Enable pixel doubling when the dot clock is > 90% of the (display)