@@ -992,13 +992,7 @@ void intel_ddi_enable_pipe_func(struct drm_crtc *crtc)
if (cpu_transcoder == TRANSCODER_EDP) {
switch (pipe) {
case PIPE_A:
- /* Can only use the always-on power well for eDP when
- * not using the panel fitter, and when not using motion
- * blur mitigation (which we don't support). */
- if (dev_priv->pch_pf_size)
- temp |= TRANS_DDI_EDP_INPUT_A_ONOFF;
- else
- temp |= TRANS_DDI_EDP_INPUT_A_ON;
+ temp |= TRANS_DDI_EDP_INPUT_A_ONOFF;
break;
case PIPE_B:
temp |= TRANS_DDI_EDP_INPUT_B_ONOFF;
@@ -5710,35 +5710,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
return fdi_config_ok ? ret : -EINVAL;
}
-static void haswell_modeset_global_resources(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- bool enable = false;
- struct intel_crtc *crtc;
- struct intel_encoder *encoder;
-
- list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
- if (crtc->pipe != PIPE_A && crtc->base.enabled)
- enable = true;
- /* XXX: Should check for edp transcoder here, but thanks to init
- * sequence that's not yet available. Just in case desktop eDP
- * on PORT D is possible on haswell, too. */
- }
-
- list_for_each_entry(encoder, &dev->mode_config.encoder_list,
- base.head) {
- if (encoder->type != INTEL_OUTPUT_EDP &&
- encoder->connectors_active)
- enable = true;
- }
-
- /* Even the eDP panel fitter is outside the always-on well. */
- if (dev_priv->pch_pf_size)
- enable = true;
-
- intel_set_power_well(dev, enable);
-}
-
static int haswell_crtc_mode_set(struct drm_crtc *crtc,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode,
@@ -8635,8 +8606,6 @@ static void intel_init_display(struct drm_device *dev)
} else if (IS_HASWELL(dev)) {
dev_priv->display.fdi_link_train = hsw_fdi_link_train;
dev_priv->display.write_eld = haswell_write_eld;
- dev_priv->display.modeset_global_resources =
- haswell_modeset_global_resources;
}
} else if (IS_G4X(dev)) {
dev_priv->display.write_eld = g4x_write_eld;
This reverts commit d6dd9eb1d96d2b7345fe4664066c2b7ed86da898. The current hsw power wells code seems to break audio - the current audio driver presumes that register contents are preserved when disablng an output, which is no longer true with the power wells code. And Takashi Iwai also reported a black screen regression. He has a machine with an eDP panel on port D (usual all-in-one config), which intel_dp.c identifies correctly as an eDP output, but our the power wells code does not differentiate between eDP on port A or D. And the magic only works on port A. References: http://www.mail-archive.com/intel-gfx@lists.freedesktop.org/msg18788.html Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Takashi Iwai <tiwai@suse.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/intel_ddi.c | 8 +------- drivers/gpu/drm/i915/intel_display.c | 31 ------------------------------- 2 files changed, 1 insertion(+), 38 deletions(-)