Message ID | 1363972761-2857-1-git-send-email-przanoni@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Fri, Mar 22, 2013 at 02:19:21PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > The first version of commit "drm/i915: there's no DSPADDR register on > Haswell" added 2 "!IS_HASWELL" checks. When reviewing the patch, Ben > suggested to make these checks more future-proof, so when Daniel > applied the patch he fixed the first check but not the second. This > commit makes the second check also "future-proof". > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Queued for -next, thanks for the patch. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 36e0445..98ac3bd 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9416,7 +9416,7 @@ intel_display_print_error_state(struct seq_file *m, if (INTEL_INFO(dev)->gen <= 3) seq_printf(m, " SIZE: %08x\n", error->plane[i].size); seq_printf(m, " POS: %08x\n", error->plane[i].pos); - if (!IS_HASWELL(dev)) + if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) seq_printf(m, " ADDR: %08x\n", error->plane[i].addr); if (INTEL_INFO(dev)->gen >= 4) { seq_printf(m, " SURF: %08x\n", error->plane[i].surface);