| Message ID | 1364240405-9700-1-git-send-email-ajax@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Mar 25, 2013 at 03:40:05PM -0400, Adam Jackson wrote: > f40ebd6b properly disabled the hsync/vsync logic at disable time, but > neglected to re-enable them at enable time. > > v2: In the enable hook, restore the connector's expected DPMS level > instead of forcing ON. Do this by stashing a back pointer to the > connector in the crt (suggested by danvet) since otherwise it's awkward > to look up. > > Signed-off-by: Adam Jackson <ajax@redhat.com> Picked up for -fixes, thanks for the patch. Also adding Patrick to cc in case he wants to chime in. -Daniel > --- > drivers/gpu/drm/i915/intel_crt.c | 40 +++++++++++++++++----------------------- > 1 file changed, 17 insertions(+), 23 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c > index 32a3693..498dafd 100644 > --- a/drivers/gpu/drm/i915/intel_crt.c > +++ b/drivers/gpu/drm/i915/intel_crt.c > @@ -45,6 +45,9 @@ > > struct intel_crt { > struct intel_encoder base; > + /* DPMS state is stored in the connector, which we need in the > + * encoder's enable/disable callbacks */ > + struct intel_connector *connector; > bool force_hotplug_required; > u32 adpa_reg; > }; > @@ -81,29 +84,6 @@ static bool intel_crt_get_hw_state(struct intel_encoder *encoder, > return true; > } > > -static void intel_disable_crt(struct intel_encoder *encoder) > -{ > - struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; > - struct intel_crt *crt = intel_encoder_to_crt(encoder); > - u32 temp; > - > - temp = I915_READ(crt->adpa_reg); > - temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; > - temp &= ~ADPA_DAC_ENABLE; > - I915_WRITE(crt->adpa_reg, temp); > -} > - > -static void intel_enable_crt(struct intel_encoder *encoder) > -{ > - struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; > - struct intel_crt *crt = intel_encoder_to_crt(encoder); > - u32 temp; > - > - temp = I915_READ(crt->adpa_reg); > - temp |= ADPA_DAC_ENABLE; > - I915_WRITE(crt->adpa_reg, temp); > -} > - > /* Note: The caller is required to filter out dpms modes not supported by the > * platform. */ > static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode) > @@ -135,6 +115,19 @@ static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode) > I915_WRITE(crt->adpa_reg, temp); > } > > +static void intel_disable_crt(struct intel_encoder *encoder) > +{ > + intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF); > +} > + > +static void intel_enable_crt(struct intel_encoder *encoder) > +{ > + struct intel_crt *crt = intel_encoder_to_crt(encoder); > + > + intel_crt_set_dpms(encoder, crt->connector->dpms); > +} > + > + > static void intel_crt_dpms(struct drm_connector *connector, int mode) > { > struct drm_device *dev = connector->dev; > @@ -746,6 +739,7 @@ void intel_crt_init(struct drm_device *dev) > } > > connector = &intel_connector->base; > + crt->connector = connector; > drm_connector_init(dev, &intel_connector->base, > &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); > > -- > 1.8.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Tue, Mar 26, 2013 at 8:57 AM, Daniel Vetter <daniel@ffwll.ch> wrote: > On Mon, Mar 25, 2013 at 03:40:05PM -0400, Adam Jackson wrote: >> f40ebd6b properly disabled the hsync/vsync logic at disable time, but >> neglected to re-enable them at enable time. >> >> v2: In the enable hook, restore the connector's expected DPMS level >> instead of forcing ON. Do this by stashing a back pointer to the >> connector in the crt (suggested by danvet) since otherwise it's awkward >> to look up. >> >> Signed-off-by: Adam Jackson <ajax@redhat.com> > Picked up for -fixes, thanks for the patch. Also adding Patrick to cc in > case he wants to chime in. > -Daniel Looks good. -Patrik
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 32a3693..498dafd 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c @@ -45,6 +45,9 @@ struct intel_crt { struct intel_encoder base; + /* DPMS state is stored in the connector, which we need in the + * encoder's enable/disable callbacks */ + struct intel_connector *connector; bool force_hotplug_required; u32 adpa_reg; }; @@ -81,29 +84,6 @@ static bool intel_crt_get_hw_state(struct intel_encoder *encoder, return true; } -static void intel_disable_crt(struct intel_encoder *encoder) -{ - struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; - struct intel_crt *crt = intel_encoder_to_crt(encoder); - u32 temp; - - temp = I915_READ(crt->adpa_reg); - temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; - temp &= ~ADPA_DAC_ENABLE; - I915_WRITE(crt->adpa_reg, temp); -} - -static void intel_enable_crt(struct intel_encoder *encoder) -{ - struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; - struct intel_crt *crt = intel_encoder_to_crt(encoder); - u32 temp; - - temp = I915_READ(crt->adpa_reg); - temp |= ADPA_DAC_ENABLE; - I915_WRITE(crt->adpa_reg, temp); -} - /* Note: The caller is required to filter out dpms modes not supported by the * platform. */ static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode) @@ -135,6 +115,19 @@ static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode) I915_WRITE(crt->adpa_reg, temp); } +static void intel_disable_crt(struct intel_encoder *encoder) +{ + intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF); +} + +static void intel_enable_crt(struct intel_encoder *encoder) +{ + struct intel_crt *crt = intel_encoder_to_crt(encoder); + + intel_crt_set_dpms(encoder, crt->connector->dpms); +} + + static void intel_crt_dpms(struct drm_connector *connector, int mode) { struct drm_device *dev = connector->dev; @@ -746,6 +739,7 @@ void intel_crt_init(struct drm_device *dev) } connector = &intel_connector->base; + crt->connector = connector; drm_connector_init(dev, &intel_connector->base, &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
f40ebd6b properly disabled the hsync/vsync logic at disable time, but neglected to re-enable them at enable time. v2: In the enable hook, restore the connector's expected DPMS level instead of forcing ON. Do this by stashing a back pointer to the connector in the crt (suggested by danvet) since otherwise it's awkward to look up. Signed-off-by: Adam Jackson <ajax@redhat.com> --- drivers/gpu/drm/i915/intel_crt.c | 40 +++++++++++++++++----------------------- 1 file changed, 17 insertions(+), 23 deletions(-)