From patchwork Tue Mar 26 23:45:01 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 2346941 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 531D8DF264 for ; Tue, 26 Mar 2013 23:51:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0A3CCE5FED for ; Tue, 26 Mar 2013 16:51:33 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ee0-f52.google.com (mail-ee0-f52.google.com [74.125.83.52]) by gabe.freedesktop.org (Postfix) with ESMTP id 355A5E60FA for ; Tue, 26 Mar 2013 16:45:28 -0700 (PDT) Received: by mail-ee0-f52.google.com with SMTP id d17so522498eek.39 for ; Tue, 26 Mar 2013 16:45:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=YVUB3Ai2XZupL/sOyrcuX1gapLyRXxGPJ/KkrwOOcOc=; b=ay9ZBSzL7NGwV03foYfqAKmY9Hgpya0mPKXQgzsiLakVddzyk0E0fv2R/pULEXUZWi iQf90lpMPcNriIwpsiIJie2PqvxwWMq0NY2CQZcttNQ+U+GfcNn1pU8s5kH/drTOwQZf iQMxWgJ8DqJosxb/ZiZ1sMx4qkJMVRvggxC4I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=YVUB3Ai2XZupL/sOyrcuX1gapLyRXxGPJ/KkrwOOcOc=; b=SnEdpzAihmBFdlpnMtVJP+f6e8DJM6hl4JPH5QoppcHXjai838fJZUUJIUEwtNVglV Pzkj3XT+vIHpvBp1mDIsnI5j6Jgi8neoGWRmdadHuJNEgpOgYM5Ix1O6mI9jT1jOxmbC r02B1+G8OomQ47ZUv0ZcLrX7FcNjFduICm1BKZd3HdwuSNNKA+NOo3IS1gXgBPURiaR0 li3L9AQ9by2WgN4La0N0HX4XAu+S7Bp0QkoZcTVCuhAavcHai7QZd2hguEU3GFYY4wA1 X/91bCEENnz9xvE5I3D81NAIkiYSovqA0SMi1F1wO13RNsdwEH4KxoGENRikhcRaa9gs VgXA== X-Received: by 10.14.173.67 with SMTP id u43mr49891733eel.22.1364341527565; Tue, 26 Mar 2013 16:45:27 -0700 (PDT) Received: from bremse.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id f47sm27941039eep.13.2013.03.26.16.45.26 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 26 Mar 2013 16:45:26 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Wed, 27 Mar 2013 00:45:01 +0100 Message-Id: <1364341502-1184-13-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1364341502-1184-1-git-send-email-daniel.vetter@ffwll.ch> References: <1364341502-1184-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQm6V71d99GUlpBovQ1ECLPFh+cnZON5f1R/Kc8XGVBwLtQgD7BXjs+H2rL19oXRt3t1R+s+ Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 12/13] drm/i915: clean up pipe bpp confusion X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org - gen4 and earlier (save for g4x) only really have a 8bpc pipe, with the possibility to dither to 6bpc using the panel fitter - g4x has hdmi, but no 12 bpc pipe ... !? Clamp hdmi accordingly. - TV/SDVO out are the only connectors available on platforms with a pipe bpp != 8, add code to force the pipe to 8bpc unconditionally. The dither handling on gmch platforms is one giant disaster. I'm hoping somewhat that vlv enabling will fix this up, but given that the 6bpc handling for edp was simply added with another quick hack, I don't have high hopes ... v2: Neither vlv nor g4x have 12bpc pipes. Still set pipe_bpp to 12*3, but let the crtc code clamp things down to 10bpc on these platforms. v3: Fix a bpc vs. bpp mixup in the gen4 and earlier pipe_bpp limiter code. v4: Drop the hunk in intel_hdmi.c about g4x/vlv 12bpc, it was wrong. Reviewed-by: Jesse Barnes Signed-off-by: Daniel Vetter Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 8 ++++++++ drivers/gpu/drm/i915/intel_sdvo.c | 3 +++ drivers/gpu/drm/i915/intel_tv.c | 14 ++++++++------ 3 files changed, 19 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index bbf31aa..8ab7520 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3954,6 +3954,14 @@ static bool intel_crtc_compute_config(struct drm_crtc *crtc, adjusted_mode->hsync_start == adjusted_mode->hdisplay) return false; + if ((IS_G4X(dev) || IS_VALLEYVIEW(dev)) && pipe_config->pipe_bpp > 10) { + pipe_config->pipe_bpp = 10*3; /* 12bpc is gen5+ */ + } else if (INTEL_INFO(dev)->gen <= 4 && pipe_config->pipe_bpp > 8) { + /* only a 8bpc pipe, with 6bpc dither through the panel fitter + * for lvds. */ + pipe_config->pipe_bpp = 8*3; + } + return true; } diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index c6fbfd1..80f8680 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c @@ -1048,6 +1048,9 @@ static bool intel_sdvo_compute_config(struct intel_encoder *encoder, struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; struct drm_display_mode *mode = &pipe_config->requested_mode; + DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n"); + pipe_config->pipe_bpp = 8*3; + if (HAS_PCH_SPLIT(encoder->base.dev)) pipe_config->has_pch_encoder = true; diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index d808421..6673726 100644 --- a/drivers/gpu/drm/i915/intel_tv.c +++ b/drivers/gpu/drm/i915/intel_tv.c @@ -905,11 +905,10 @@ intel_tv_mode_valid(struct drm_connector *connector, static bool -intel_tv_mode_fixup(struct drm_encoder *encoder, - const struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) +intel_tv_compute_config(struct intel_encoder *encoder, + struct intel_crtc_config *pipe_config) { - struct intel_tv *intel_tv = enc_to_intel_tv(encoder); + struct intel_tv *intel_tv = enc_to_intel_tv(&encoder->base); const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv); if (!tv_mode) @@ -918,7 +917,10 @@ intel_tv_mode_fixup(struct drm_encoder *encoder, if (intel_encoder_check_is_cloned(&intel_tv->base)) return false; - adjusted_mode->clock = tv_mode->clock; + pipe_config->adjusted_mode.clock = tv_mode->clock; + DRM_DEBUG_KMS("forcing bpc to 8 for TV\n"); + pipe_config->pipe_bpp = 8*3; + return true; } @@ -1485,7 +1487,6 @@ out: } static const struct drm_encoder_helper_funcs intel_tv_helper_funcs = { - .mode_fixup = intel_tv_mode_fixup, .mode_set = intel_tv_mode_set, }; @@ -1620,6 +1621,7 @@ intel_tv_init(struct drm_device *dev) drm_encoder_init(dev, &intel_encoder->base, &intel_tv_enc_funcs, DRM_MODE_ENCODER_TVDAC); + intel_encoder->compute_config = intel_tv_compute_config; intel_encoder->enable = intel_enable_tv; intel_encoder->disable = intel_disable_tv; intel_encoder->get_hw_state = intel_tv_get_hw_state;