From patchwork Thu Mar 28 09:41:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 2355701 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 60B0A3FDDA for ; Thu, 28 Mar 2013 09:44:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4CF5FE5C30 for ; Thu, 28 Mar 2013 02:44:27 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ea0-f169.google.com (mail-ea0-f169.google.com [209.85.215.169]) by gabe.freedesktop.org (Postfix) with ESMTP id 1670DE5F5F for ; Thu, 28 Mar 2013 02:42:19 -0700 (PDT) Received: by mail-ea0-f169.google.com with SMTP id n15so2265704ead.28 for ; Thu, 28 Mar 2013 02:42:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=y/NK6kZf8NIH/sPqg5U8fWSbF46NJfCteV0NAC9Z2w8=; b=S0+PIZZ0onPSQ2ob9u9c7Hk9BriwQr3a6lFwokWljOIlwyBqd6HDMFLDgE68av+2tc xn/Koc4O1p8GTgycE4s/L6ZLeDW2RW7Vv+aTY1DaFQGMfCSzZ3EBamSFqey8FZQGTkdY GdsUZQr+hIrdPJ32s8KsajyOxe3GJqkr6Qh0E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=y/NK6kZf8NIH/sPqg5U8fWSbF46NJfCteV0NAC9Z2w8=; b=k6Y//1T7weoVV0QtlymZzvEeOe1Aj8M9iENEgRsjGjVsPVbktndoems8MX5YjA5o4D 4dyLxLu8eNkg4S4JmCtVXf6p/UUl/2AaATaquEdbVL7WeyebSxW4m4kU9l8iioEteR/Y xIwbK37lxJqgLzCbft91zSV2rVNs7+xI3qDRCrxqMXese/VB2o5wUmtKYTVK5rZCuwMz /mNIDImO37aIpFY48ReusQHKTtkAEw31tzEje5n/Mms0vj5o3F/CFVRaT1vouDICP5/K pSB9kuiNv23GKGTcHCRvaAWRDwElqNJRk4UZNXXVBt0lf0MVqtA8SYbI6eCAzZ9bl1xz luCA== X-Received: by 10.14.179.201 with SMTP id h49mr16861428eem.26.1364463739150; Thu, 28 Mar 2013 02:42:19 -0700 (PDT) Received: from bremse.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id 3sm36529070eej.6.2013.03.28.02.42.16 (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 28 Mar 2013 02:42:17 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 28 Mar 2013 10:41:58 +0100 Message-Id: <1364463723-30252-4-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1364463723-30252-1-git-send-email-daniel.vetter@ffwll.ch> References: <1364463723-30252-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQmcntnOsnXM3LVN8wDrrANoeqpnQtxmki3yTG9z68y7JUxFuWOTjus40aeM+wH4VTx9Befy Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 3/8] drm/i915: track dp target_clock in pipe_config X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org We need it in the fdi m_n computation, which nicely kills almost all ugly special cases in there. It looks like we also need this to handle 12bpc hdmi correctly. Eventually it might be better to switch things around and put the target clock into adjusted_mode->clock and create a new pipe_config parameter for the port link clock. v2: Add a massive comment in the code to explain this mess. v3: s/dp_target_clock/pixel_target_clock in anticipation of the hdmi use-case. Signed-off-by: Daniel Vetter Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 25 +++---------------------- drivers/gpu/drm/i915/intel_dp.c | 1 + drivers/gpu/drm/i915/intel_drv.h | 7 ++++++- 3 files changed, 10 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index dfa8919..464eb90 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5356,25 +5356,9 @@ static void ironlake_fdi_set_m_n(struct drm_crtc *crtc) struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct drm_display_mode *adjusted_mode = &intel_crtc->config.adjusted_mode; - struct drm_display_mode *mode = &intel_crtc->config.requested_mode; - struct intel_encoder *intel_encoder, *edp_encoder = NULL; struct intel_link_m_n m_n = {0}; int target_clock, lane, link_bw; - bool is_dp = false, is_cpu_edp = false; - - for_each_encoder_on_crtc(dev, crtc, intel_encoder) { - switch (intel_encoder->type) { - case INTEL_OUTPUT_DISPLAYPORT: - is_dp = true; - break; - case INTEL_OUTPUT_EDP: - is_dp = true; - if (!intel_encoder_is_pch_edp(&intel_encoder->base)) - is_cpu_edp = true; - edp_encoder = intel_encoder; - break; - } - } + uint32_t bps; /* FDI is a binary signal running at ~2.7GHz, encoding * each output octet as 10 bits. The actual frequency @@ -5385,11 +5369,8 @@ static void ironlake_fdi_set_m_n(struct drm_crtc *crtc) */ link_bw = intel_fdi_link_freq(dev) * MHz(100)/KHz(1)/10; - /* [e]DP over FDI requires target mode clock instead of link clock. */ - if (edp_encoder) - target_clock = intel_edp_target_clock(edp_encoder, mode); - else if (is_dp) - target_clock = mode->clock; + if (intel_crtc->config.pixel_target_clock) + target_clock = intel_crtc->config.pixel_target_clock; else target_clock = adjusted_mode->clock; diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index ef680d5..b1bf00b 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -753,6 +753,7 @@ found: intel_dp->lane_count = lane_count; adjusted_mode->clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw); pipe_config->pipe_bpp = bpp; + pipe_config->pixel_target_clock = target_clock; DRM_DEBUG_KMS("DP link bw %02x lane count %d clock %d bpp %d\n", intel_dp->link_bw, intel_dp->lane_count, diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 41fabcb..2a86a12 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -198,7 +198,12 @@ struct intel_crtc_config { bool dither; int pipe_bpp; struct intel_link_m_n dp_m_n; - + /** + * This is currently used by DP and HDMI encoders since those can have a + * target pixel clock != the port link clock (which is currently stored + * in adjusted_mode->clock). + */ + int pixel_target_clock; /* Used by SDVO (and if we ever fix it, HDMI). */ unsigned pixel_multiplier; };