From patchwork Thu Mar 28 09:42:01 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 2355761 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id DC8BF3FDDA for ; Thu, 28 Mar 2013 09:46:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D34BBE5C1E for ; Thu, 28 Mar 2013 02:46:27 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ea0-f170.google.com (mail-ea0-f170.google.com [209.85.215.170]) by gabe.freedesktop.org (Postfix) with ESMTP id 5A76BE5E55 for ; Thu, 28 Mar 2013 02:42:27 -0700 (PDT) Received: by mail-ea0-f170.google.com with SMTP id a15so3944615eae.29 for ; Thu, 28 Mar 2013 02:42:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=CafBQGTfDhDkadDMhUGfwEKsW7PiZmsWlQ+rzD3UDz4=; b=GcGau8HnpaR2ir3TmnoMmPNMkSHgqa2xnfIjG+J4xUwlBKkPUhZoU1blpUs47mNnCz mB7dNL8y363IgmGZQobflfDkARsj9z6rE1GVhVc5kkz4k+lW1TtiZn1zuDmETYGTZszy AkGuWquCVbcuCFMBAcQr1S27vQTznilFx5WmA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=CafBQGTfDhDkadDMhUGfwEKsW7PiZmsWlQ+rzD3UDz4=; b=YuUX4DxG63FYri0JyAlj+8q5w3srOFU6BOw3Am1XnNlK8A5mTB3XW5NNIkeN4crhjB lNIbbaFVXKxd79mN66Y4bLZSffTpRwS6EnGAH8QAJwTia9vs/2ZS2bsr0o5/nEg0IxYF xeNIjM4ycifJNnsPLT1QwQC0UhOFsxAi/X3HiNaVsBTMs34swSCwjJsKt1pgttA4vVeI WBqUxloxdmXHZ/czFCXGRbD8jRBC4Bz8kNjNuIWYcqWuiTBpCkqFDqriyq6PUTKr5MfJ q6Res2cujMBSnP/oDDKLw6S02M4y9zMLPNlMwECJ+KHPQcr8diQhsJE56bp2isuFYwo/ J34A== X-Received: by 10.15.32.67 with SMTP id z43mr47482521eeu.24.1364463746461; Thu, 28 Mar 2013 02:42:26 -0700 (PDT) Received: from bremse.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPS id 3sm36529070eej.6.2013.03.28.02.42.24 (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 28 Mar 2013 02:42:25 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 28 Mar 2013 10:42:01 +0100 Message-Id: <1364463723-30252-7-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1364463723-30252-1-git-send-email-daniel.vetter@ffwll.ch> References: <1364463723-30252-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQkyM/cAJyOZasubUHWnF13yNd8WjgUaKoZFi3yKE6CeIMQRJmxrnAIHrOQpdOpPAmVBCgh4 Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 6/8] drm/i915: hw readout support for ->has_pch_encoders X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Now we can ditch the checks in the Haswell disable code. v2: add support for Haswell Signed-off-by: Daniel Vetter Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 34 +++++++++++++++++++++++++--------- 1 file changed, 25 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a5adaa0..c9e873e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2975,11 +2975,6 @@ static void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc) mutex_unlock(&dev->struct_mutex); } -static bool haswell_crtc_driving_pch(struct drm_crtc *crtc) -{ - return intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG); -} - /* Program iCLKIP clock to the desired frequency */ static void lpt_program_iclkip(struct drm_crtc *crtc) { @@ -3562,13 +3557,10 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) int pipe = intel_crtc->pipe; int plane = intel_crtc->plane; enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder; - bool is_pch_port; if (!intel_crtc->active) return; - is_pch_port = haswell_crtc_driving_pch(crtc); - for_each_encoder_on_crtc(dev, crtc, encoder) encoder->disable(encoder); @@ -3595,7 +3587,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) if (encoder->post_disable) encoder->post_disable(encoder); - if (is_pch_port) { + if (intel_crtc->config.has_pch_encoder) { lpt_disable_pch_transcoder(dev_priv); intel_ddi_fdi_disable(crtc); } @@ -5635,6 +5627,9 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc, if (!(tmp & PIPECONF_ENABLE)) return false; + if (I915_READ(TRANSCONF(crtc->pipe)) & TRANS_ENABLE) + pipe_config->has_pch_encoder = true; + return true; } @@ -5763,6 +5758,17 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, if (!(tmp & PIPECONF_ENABLE)) return false; + /* + * aswell has only FDI/PCH transcoder A. It is which is connected to + * DDI E. So just check whether this pipe is wired to DDI E and whether + * the PCH transcoder is on. + */ + tmp = I915_READ(TRANS_DDI_FUNC_CTL(crtc->pipe)); + if ((tmp & TRANS_DDI_PORT_MASK) == TRANS_DDI_SELECT_PORT(PORT_E) && + I915_READ(TRANSCONF(PIPE_A)) & TRANS_ENABLE) + pipe_config->has_pch_encoder = true; + + return true; } @@ -7692,6 +7698,14 @@ static bool intel_pipe_config_compare(struct intel_crtc_config *current_config, struct intel_crtc_config *pipe_config) { + if (current_config->has_pch_encoder != pipe_config->has_pch_encoder) { + DRM_ERROR("mismatch in has_pch_encoder " + "(expected %i, found %i)\n", + current_config->has_pch_encoder, + pipe_config->has_pch_encoder); + return false; + } + return true; } @@ -7791,6 +7805,7 @@ intel_modeset_check_state(struct drm_device *dev) "crtc's computed enabled state doesn't match tracked enabled state " "(expected %i, found %i)\n", enabled, crtc->base.enabled); + memset(&pipe_config, 0, sizeof(pipe_config)); active = dev_priv->display.get_pipe_config(crtc, &pipe_config); WARN(crtc->active != active, @@ -9155,6 +9170,7 @@ void intel_modeset_setup_hw_state(struct drm_device *dev, setup_pipes: list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) { + memset(&crtc->config, 0, sizeof(crtc->config)); crtc->active = dev_priv->display.get_pipe_config(crtc, &crtc->config);