[07/11] drm/i915: fix VLV limits and m/n/p calculations v2

Commit Message

Jesse Barnes March 28, 2013, 4:55 p.m. UTC

From: Pallavi G <[e-mail]>

For high res modes m n p calculation is fixed for VLV platform.

v2: use 64 bit types and math (Ville)

Signed-off-by: Pallavi G <[e-mail]>
Signed-off-by: Vijay Purushothaman <[e-mail]>
Signed-off-by: Yogesh M <[e-mail]>
Signed-off-by: Gajanan Bhat <[e-mail]>
---
 drivers/gpu/drm/i915/intel_display.c |   25 +++++++++++++++----------
 1 file changed, 15 insertions(+), 10 deletions(-)

Comments

Daniel Vetter April 2, 2013, 6:59 p.m. UTC | #1

On Thu, Mar 28, 2013 at 09:55:43AM -0700, Jesse Barnes wrote:
> From: Pallavi G <[e-mail]>
> 
> For high res modes m n p calculation is fixed for VLV platform.
> 
> v2: use 64 bit types and math (Ville)
> 
> Signed-off-by: Pallavi G <[e-mail]>
> Signed-off-by: Vijay Purushothaman <[e-mail]>
> Signed-off-by: Yogesh M <[e-mail]>
> Signed-off-by: Gajanan Bhat <[e-mail]>

I'd love to have a fixed dp pll values look-up table like we have for
other platforms, so that we use _exactly_ what the hw guys recommend.

Also: Did I mention that I've failed to count the indent level of the vlv
pll computation function? And iirc that's been promised to eventually get
fixed ...

I'll random-punt on this one here for now.
-Daniel

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9cb0b53..5cc12dc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -31,6 +31,7 @@ 
 #include <linux/kernel.h>
 #include <linux/slab.h>
 #include <linux/vgaarb.h>
+#include <linux/math64.h>
 #include <drm/drm_edid.h>
 #include <drm/drmP.h>
 #include "intel_drv.h"
@@ -396,21 +397,21 @@  static const intel_limit_t intel_limits_vlv_dac = {
 	.m1 = { .min = 2, .max = 3 },
 	.m2 = { .min = 11, .max = 156 },
 	.p = { .min = 10, .max = 30 },
-	.p1 = { .min = 2, .max = 3 },
+	.p1 = { .min = 1, .max = 3 },
 	.p2 = { .dot_limit = 270000,
 		.p2_slow = 2, .p2_fast = 20 },
 	.find_pll = intel_vlv_find_best_pll,
 };
 
 static const intel_limit_t intel_limits_vlv_hdmi = {
-	.dot = { .min = 20000, .max = 165000 },
-	.vco = { .min = 4000000, .max = 5994000},
-	.n = { .min = 1, .max = 7 },
+	.dot = { .min = 25000, .max = 180000 },
+	.vco = { .min = 4040000, .max = 5960000 },
+	.n = { .min = 1, .max = 5 },
 	.m = { .min = 60, .max = 300 }, /* guess */
 	.m1 = { .min = 2, .max = 3 },
-	.m2 = { .min = 11, .max = 156 },
+	.m2 = { .min = 15, .max = 149 },
 	.p = { .min = 10, .max = 30 },
-	.p1 = { .min = 2, .max = 3 },
+	.p1 = { .min = 1, .max = 3 },
 	.p2 = { .dot_limit = 270000,
 		.p2_slow = 2, .p2_fast = 20 },
 	.find_pll = intel_vlv_find_best_pll,
@@ -424,7 +425,7 @@  static const intel_limit_t intel_limits_vlv_dp = {
 	.m1 = { .min = 2, .max = 3 },
 	.m2 = { .min = 11, .max = 156 },
 	.p = { .min = 10, .max = 30 },
-	.p1 = { .min = 2, .max = 3 },
+	.p1 = { .min = 1, .max = 3 },
 	.p2 = { .dot_limit = 270000,
 		.p2_slow = 2, .p2_fast = 20 },
 	.find_pll = intel_vlv_find_best_pll,
@@ -822,10 +823,13 @@  intel_vlv_find_best_pll(const intel_limit_t *limit, struct drm_crtc *crtc,
 			int target, int refclk, intel_clock_t *match_clock,
 			intel_clock_t *best_clock)
 {
+#define LONG_OVERFLOW 0x7FFFFFFF
+#define DIFF_OVERFLOW (LONG_OVERFLOW/10000)
+
 	u32 p1, p2, m1, m2, vco, bestn, bestm1, bestm2, bestp1, bestp2;
 	u32 m, n, fastclk;
 	u32 updrate, minupdate, fracbits, p;
-	unsigned long bestppm, ppm, absppm;
+	s64 bestppm, ppm, absppm, ppmdiff;
 	int dotclk, flag;
 
 	flag = 0;
@@ -854,8 +858,9 @@  intel_vlv_find_best_pll(const intel_limit_t *limit, struct drm_crtc *crtc,
 					m = m1 * m2;
 					vco = updrate * m;
 					if (vco >= limit->vco.min && vco < limit->vco.max) {
-						ppm = 1000000 * ((vco / p) - fastclk) / fastclk;
-						absppm = (ppm > 0) ? ppm : (-ppm);
+						ppmdiff = div_s64((100*vco), p) - (100*fastclk);
+						absppm = div_s64((abs64(ppmdiff)*10000), fastclk);
+
 						if (absppm < 100 && ((p1 * p2) > (bestp1 * bestp2))) {
 							bestppm = 0;
 							flag = 1;