From patchwork Mon Apr 8 18:48:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 2410881 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 40AD43FC71 for ; Mon, 8 Apr 2013 18:50:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2DF2AE6081 for ; Mon, 8 Apr 2013 11:50:25 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-qe0-f53.google.com (mail-qe0-f53.google.com [209.85.128.53]) by gabe.freedesktop.org (Postfix) with ESMTP id B1B8FE617A for ; Mon, 8 Apr 2013 11:49:19 -0700 (PDT) Received: by mail-qe0-f53.google.com with SMTP id q19so3244565qeb.26 for ; Mon, 08 Apr 2013 11:49:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=UpgdfeVDuloeAcFsp879dNWbDI6T5rtnP1jD82ZLrdM=; b=pGP1/azwJ/0zkm23yRIKq+YSJ/fh3T8NLPqX5quy74TPCQuDwcykTuDmb3WlpBW0Ht 81m8CwbLM5vlKVGfhTwZLnselDTNEUlXApOTVg0GVUajiOaOW4h+/MifFveTuhjL7alG CYNBneSfzgCOaXDq3TLLy3RIz6bYJDmyW8zyhMZvj+ncfooXs2rqqD6qYmZoqnHMRScT 0L9dbzQXI6QyTZJkjfKhhSW6Bqq0kFPVAJLaIupPlQ/6B97fnI3LrOcL2dM1Sm/w0uPl x3+WbZ1+vQbDU7rHm5uf54q9mYyyL6TVdyuXWgsTEFg+jSB3u3lcI/MnROnnJOyI2JgZ tv6g== X-Received: by 10.229.127.75 with SMTP id f11mr7214579qcs.94.1365446959126; Mon, 08 Apr 2013 11:49:19 -0700 (PDT) Received: from localhost.localdomain (189.26.47.15.dynamic.adsl.gvt.net.br. [189.26.47.15]) by mx.google.com with ESMTPS id k8sm23849355qej.2.2013.04.08.11.49.17 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 08 Apr 2013 11:49:18 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Mon, 8 Apr 2013 15:48:08 -0300 Message-Id: <1365446888-3698-2-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1365446888-3698-1-git-send-email-przanoni@gmail.com> References: <1365446888-3698-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 2/2] drm/i915: preserve the PBC bits of TRANS_CHICKEN2 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Paulo Zanoni Bits 30 and 24:0 are PBC, so don't zero them. Some of the other bits are being zeroed, but I couldn't find a reason for this, so leave them as they are for now to avoid regressions. Signed-off-by: Paulo Zanoni Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/i915_reg.h | 8 ++++++-- drivers/gpu/drm/i915/intel_pm.c | 7 ++++++- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 759b1b8..f4d6673 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3949,8 +3949,12 @@ #define _TRANSA_CHICKEN2 0xf0064 #define _TRANSB_CHICKEN2 0xf1064 #define TRANS_CHICKEN2(pipe) _PIPE(pipe, _TRANSA_CHICKEN2, _TRANSB_CHICKEN2) -#define TRANS_CHICKEN2_TIMING_OVERRIDE (1<<31) -#define TRANS_CHICKEN2_FDI_POLARITY_REVERSED (1<<29) +#define TRANS_CHICKEN2_TIMING_OVERRIDE (1<<31) +#define TRANS_CHICKEN2_FDI_POLARITY_REVERSED (1<<29) +#define TRANS_CHICKEN2_FRAME_START_DELAY_MASK (3<<27) +#define TRANS_CHICKEN2_DISABLE_DEEP_COLOR_COUNTER (1<<26) +#define TRANS_CHICKEN2_DISABLE_DEEP_COLOR_MODESWITCH (1<<25) +#define TRANS_CHICKEN2_PBC (1<<30 | 0x1ffffff) #define SOUTH_CHICKEN1 0xc2000 #define FDIA_PHASE_SYNC_SHIFT_OVR 19 diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index ce3d892..e4ead41 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3589,9 +3589,14 @@ static void cpt_init_clock_gating(struct drm_device *dev) * downward, on (only) LVDS of some HP laptops with IVY. */ for_each_pipe(pipe) { - val = TRANS_CHICKEN2_TIMING_OVERRIDE; + val = I915_READ(TRANS_CHICKEN2(pipe)); + val |= TRANS_CHICKEN2_TIMING_OVERRIDE; + val &= ~TRANS_CHICKEN2_FDI_POLARITY_REVERSED; if (dev_priv->fdi_rx_polarity_inverted) val |= TRANS_CHICKEN2_FDI_POLARITY_REVERSED; + val &= ~TRANS_CHICKEN2_FRAME_START_DELAY_MASK; + val &= ~TRANS_CHICKEN2_DISABLE_DEEP_COLOR_COUNTER; + val &= ~TRANS_CHICKEN2_DISABLE_DEEP_COLOR_MODESWITCH; I915_WRITE(TRANS_CHICKEN2(pipe), val); } /* WADP0ClockGatingDisable */