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[1/4] drm/i915: Disable primary plane trickle feed for g4x

Message ID 1366218721-17777-1-git-send-email-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjälä April 17, 2013, 5:11 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The docs say that the trickle feed disable bit is present (for primary
planes only, not video sprites) on BLC and CTG, and that it must be set
for ELK. Just set it for all g4x chipset.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Chris Wilson April 17, 2013, 5:25 p.m. UTC | #1 
On Wed, Apr 17, 2013 at 08:11:58PM +0300, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The docs say that the trickle feed disable bit is present (for primary
> planes only, not video sprites) on BLC and CTG, and that it must be set
> for ELK. Just set it for all g4x chipset.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

I'm stunned that we did all the post-pch chipsets but missed g4x.
Perhaps we should also do it during init_clock_gating() as we do for
other generations?
-Chris
Ville Syrjälä April 17, 2013, 5:46 p.m. UTC | #2 
On Wed, Apr 17, 2013 at 06:25:29PM +0100, Chris Wilson wrote:
> On Wed, Apr 17, 2013 at 08:11:58PM +0300, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > The docs say that the trickle feed disable bit is present (for primary
> > planes only, not video sprites) on BLC and CTG, and that it must be set
> > for ELK. Just set it for all g4x chipset.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> I'm stunned that we did all the post-pch chipsets but missed g4x.
> Perhaps we should also do it during init_clock_gating() as we do for
> other generations?

Actually we do it in both ironlake_update_plane() and
init_clock_gating() for gen5+. I guess someone wanted to make sure
the bit sticks ;)

I'm thinking I'd rather kill the init_clock_gating() parts since that
would keep the whole plane setup in one place.
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 21f368c..fb88356 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2150,6 +2150,9 @@  static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
 			dspcntr &= ~DISPPLANE_TILED;
 	}
 
+	if (IS_G4X(dev))
+		dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
+
 	I915_WRITE(reg, dspcntr);
 
 	linear_offset = y * fb->pitches[0] + x * (fb->bits_per_pixel / 8);