From patchwork Wed Apr 17 17:12:01 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 2455061 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 81E853FC64 for ; Wed, 17 Apr 2013 17:18:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 64179E5D4D for ; Wed, 17 Apr 2013 10:18:00 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 97FE0E5D08 for ; Wed, 17 Apr 2013 10:12:14 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 17 Apr 2013 10:12:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.87,494,1363158000"; d="scan'208";a="323873325" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.168]) by fmsmga002.fm.intel.com with SMTP; 17 Apr 2013 10:12:12 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 17 Apr 2013 20:12:11 +0300 From: ville.syrjala@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Wed, 17 Apr 2013 20:12:01 +0300 Message-Id: <1366218721-17777-4-git-send-email-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1366218721-17777-1-git-send-email-ville.syrjala@linux.intel.com> References: <1366218721-17777-1-git-send-email-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 4/4] drm/i915: Use ILK+ style video sprites for Gen4.5 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From: Ville Syrjälä According to the docs CTG and BLC have similar video sprites as ILK/SNB. This is what the docs say about video sprite features: CTG and BLC have video sprites, and in addition CTG-B has YUV byte order selection, live surface registers, and sprite scale registers. I'm not sure how to translate that into real code. BLC I assume means Bearlake-C, but I don't really know what it means for us. I'm thinking that the PCI ID for BLC could be 8086:2982, aka. G35 and apparently sometimes called Bearlake-G+. Looks like cureently we're treating it like a 965 though, not a g4x. Also I'm not sure where ELK fits. It's not explicitly mentioned in most places, but when it is, it usually seems to match CTG features. The machine I have here is 8086:2e22 which is ELK AFAICT, and my code works on it, so apparently ELK also has video sprites, and they seem happy to scale the content, and YUV byte order selection seems to work as well. There's kind of similar confusion about the frame counter registers since the docs just say that CL uses the old style, CTG/ELK use the new style. No mention of BW, BL or BLC here. BLC is special in may places, in some places it matches BW/CL and in some cases CTG. For now I just chose to enable use the video sprite code paths when IS_G4X() is true, and I've ignored the no-scale/no-YUV byte order selection issues. Unfortunatly I don't have the hardware to verify all the details. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 4 ++-- drivers/gpu/drm/i915/intel_sprite.c | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 4f3b490..9ed2b04 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9056,7 +9056,7 @@ void intel_modeset_init(struct drm_device *dev) for (i = 0; i < INTEL_INFO(dev)->num_pipes; i++) { intel_crtc_init(dev, i); - if (INTEL_INFO(dev)->gen <= 4) + if (INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev)) continue; for (j = 0; j < dev_priv->num_plane; j++) { @@ -9087,7 +9087,7 @@ void intel_modeset_init(struct drm_device *dev) } /* two pipes and planes A+B+C */ - if (INTEL_INFO(dev)->gen <= 4 && + if (INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev) && INTEL_INFO(dev)->num_pipes == 2) { ret = intel_plane_init(dev, 0, PLANE_C); if (ret) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 026e6b8..ae78942 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -862,7 +862,7 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, return -EINVAL; /* Don't modify another pipe's plane */ - if (INTEL_INFO(dev)->gen <= 4) { + if (INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev)) { if (!gen2_check_pipe_sel(plane, pipe)) return -EINVAL; } else { @@ -1178,7 +1178,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane) case 4: case 5: case 6: - if (INTEL_INFO(dev)->gen <= 4) { + if (INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev)) { intel_plane->can_scale = false; intel_plane->max_downscale = 1; @@ -1249,7 +1249,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane) intel_plane->pipe = pipe; intel_plane->plane = plane; - if (INTEL_INFO(dev)->gen >= 5) + if (INTEL_INFO(dev)->gen >= 5 || IS_G4X(dev)) possible_crtcs = 1 << pipe; else possible_crtcs = (1 << INTEL_INFO(dev)->num_pipes) - 1;