From patchwork Tue Apr 23 17:52:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 2479501 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id 4B10BDF2E5 for ; Tue, 23 Apr 2013 17:54:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4853EE6101 for ; Tue, 23 Apr 2013 10:54:08 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-qc0-f181.google.com (mail-qc0-f181.google.com [209.85.216.181]) by gabe.freedesktop.org (Postfix) with ESMTP id CD001E6243 for ; Tue, 23 Apr 2013 10:52:42 -0700 (PDT) Received: by mail-qc0-f181.google.com with SMTP id a22so460800qcs.40 for ; Tue, 23 Apr 2013 10:52:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=98VLzWXzw1xw+xUzFvI2QK8Igs+2qmUlVME5B9LaIf0=; b=p5F6FibYsl2a93sFWc7YBVIa5zHmzj+ptgpHaq3PjSjYXgBNOoD/LrXGDccwbD1u7g QDCgv8Fjl+PzDTikC2poH8k0fePYImgLr7H/8zjRXENp7oQfLW/DSL6teMT+XyeKJMeL 26c7AHzjf2C7+wBdN1KfDWKuGfiwrfcdRlsYbPa9otnzWAhQYykOvV3IucrxyjCPWdtr AwWkJoaNfSFy8lb3MNqSE8N+S03CCAU4nhz/pWXp2ui0fm8Usb22P9wyozY5Fa0Y/6j5 cGsLJxklcCIjA4ycX2U9DMK5+1fLJ0pvV0U0A7Zcyc5cDN/BIHg0e0SeAO+zUzOVQyr+ 3Jfw== X-Received: by 10.224.29.145 with SMTP id q17mr26945087qac.75.1366739562307; Tue, 23 Apr 2013 10:52:42 -0700 (PDT) Received: from localhost.localdomain ([177.110.77.87]) by mx.google.com with ESMTPS id k8sm32546095qej.2.2013.04.23.10.52.40 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 23 Apr 2013 10:52:41 -0700 (PDT) From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Tue, 23 Apr 2013 14:52:17 -0300 Message-Id: <1366739541-4565-3-git-send-email-rodrigo.vivi@gmail.com> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1366739541-4565-1-git-send-email-rodrigo.vivi@gmail.com> References: <1366739541-4565-1-git-send-email-rodrigo.vivi@gmail.com> Subject: [Intel-gfx] [PATCH 2/6] drm/i915: IVB FBC WaFbcAsynchFlipDisableFbcQueue X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Display register 42000h bit 22 must be set to 1b for the entire time that Frame Buffer Compression is enabled. Signed-off-by: Rodrigo Vivi Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 86a941a..6315627 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -270,6 +270,8 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, unsigned long interval) IVB_DPFC_CTL_FENCE_EN | intel_crtc->plane << IVB_DPFC_CTL_PLANE_SHIFT); + /* WaFbcAsynchFlipDisableFbcQueue */ + I915_WRITE(ILK_DISPLAY_CHICKEN1, ILK_FBCQ_DIS); I915_WRITE(SNB_DPFC_CTL_SA, SNB_CPU_FENCE_ENABLE | obj->fence_reg); I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc->y);