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[2/4] drm/i915: use msecs_to_jiffies_timeout instead of open coding the same

Message ID 1369155800-19654-2-git-send-email-imre.deak@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Imre Deak May 21, 2013, 5:03 p.m. UTC
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_i2c.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Daniel Vetter May 21, 2013, 5:20 p.m. UTC | #1
We have another one of these in the wait_for register wait macro in
intel_drv.h Can you please amend your patch with that fixed up, too?

Thanks, Daniel

On Tue, May 21, 2013 at 7:03 PM, Imre Deak <imre.deak@intel.com> wrote:
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_i2c.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
> index 5d24503..98cd8535 100644
> --- a/drivers/gpu/drm/i915/intel_i2c.c
> +++ b/drivers/gpu/drm/i915/intel_i2c.c
> @@ -228,7 +228,7 @@ gmbus_wait_hw_status(struct drm_i915_private *dev_priv,
>          * need to wake up periodically and check that ourselves. */
>         I915_WRITE(GMBUS4 + reg_offset, gmbus4_irq_en);
>
> -       for (i = 0; i < msecs_to_jiffies(50) + 1; i++) {
> +       for (i = 0; i < msecs_to_jiffies_timeout(50); i++) {
>                 prepare_to_wait(&dev_priv->gmbus_wait_queue, &wait,
>                                 TASK_UNINTERRUPTIBLE);
>
> --
> 1.8.1.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Imre Deak May 21, 2013, 6 p.m. UTC | #2
On Tue, 2013-05-21 at 19:20 +0200, Daniel Vetter wrote:
> We have another one of these in the wait_for register wait macro in
> intel_drv.h Can you please amend your patch with that fixed up, too?

I noticed it, but didn't change it since we don't need there the +1
adjustment to begin with. The time_after() check already makes sure we
wait at least MS amount. So I think we should remove +1 from there..

--Imre
Daniel Vetter May 21, 2013, 6:20 p.m. UTC | #3
On Tue, May 21, 2013 at 8:00 PM, Imre Deak <imre.deak@intel.com> wrote:
> On Tue, 2013-05-21 at 19:20 +0200, Daniel Vetter wrote:
>> We have another one of these in the wait_for register wait macro in
>> intel_drv.h Can you please amend your patch with that fixed up, too?
>
> I noticed it, but didn't change it since we don't need there the +1
> adjustment to begin with. The time_after() check already makes sure we
> wait at least MS amount. So I think we should remove +1 from there..

Hm, right. Looks like the important part of

commit 1d5bfac96f1e1856fbdb3f06679691e5b9c2ba8f
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Thu Mar 28 00:03:25 2013 +0100

    drm/i915: fix up _wait_for macro

was to just recheck the condition after the timeout expired. I agree
that this is a separate patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 5d24503..98cd8535 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -228,7 +228,7 @@  gmbus_wait_hw_status(struct drm_i915_private *dev_priv,
 	 * need to wake up periodically and check that ourselves. */
 	I915_WRITE(GMBUS4 + reg_offset, gmbus4_irq_en);
 
-	for (i = 0; i < msecs_to_jiffies(50) + 1; i++) {
+	for (i = 0; i < msecs_to_jiffies_timeout(50); i++) {
 		prepare_to_wait(&dev_priv->gmbus_wait_queue, &wait,
 				TASK_UNINTERRUPTIBLE);