| Message ID | 1369751335-9008-1-git-send-email-daniel.vetter@ffwll.ch (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
2013/5/28 Daniel Vetter <daniel.vetter@ffwll.ch>: > - Correct cpu->pch display matching is already check when we detect > the PCH type at driver load. > - Plane/pipe state is already checked both when a) enabling, b) > disabling and in c) the modeset state checker. No need to go > overboard and also check it in in between a) and b). Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > > Cc: Paulo Zanoni <przanoni@gmail.com> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> > --- > drivers/gpu/drm/i915/intel_display.c | 9 --------- > 1 file changed, 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 5baf14c..a40c186 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5861,15 +5861,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, > int plane = intel_crtc->plane; > int ret; > > - /* We are not sure yet this won't happen. */ > - WARN(!HAS_PCH_LPT(dev), "Unexpected PCH type %d\n", > - INTEL_PCH_TYPE(dev)); > - > - WARN_ON(I915_READ(PIPECONF(intel_crtc->config.cpu_transcoder)) & > - (PIPECONF_ENABLE | I965_PIPECONF_ACTIVE)); > - > - WARN_ON(I915_READ(DSPCNTR(plane)) & DISPLAY_PLANE_ENABLE); > - > if (!intel_ddi_pll_mode_set(crtc)) > return -EINVAL; > > -- > 1.7.11.7 >
On Tue, May 28, 2013 at 11:30:44AM -0300, Paulo Zanoni wrote: > 2013/5/28 Daniel Vetter <daniel.vetter@ffwll.ch>: > > - Correct cpu->pch display matching is already check when we detect > > the PCH type at driver load. > > - Plane/pipe state is already checked both when a) enabling, b) > > disabling and in c) the modeset state checker. No need to go > > overboard and also check it in in between a) and b). > > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Queued for -next, thanks for the review. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 5baf14c..a40c186 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5861,15 +5861,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, int plane = intel_crtc->plane; int ret; - /* We are not sure yet this won't happen. */ - WARN(!HAS_PCH_LPT(dev), "Unexpected PCH type %d\n", - INTEL_PCH_TYPE(dev)); - - WARN_ON(I915_READ(PIPECONF(intel_crtc->config.cpu_transcoder)) & - (PIPECONF_ENABLE | I965_PIPECONF_ACTIVE)); - - WARN_ON(I915_READ(DSPCNTR(plane)) & DISPLAY_PLANE_ENABLE); - if (!intel_ddi_pll_mode_set(crtc)) return -EINVAL;
- Correct cpu->pch display matching is already check when we detect the PCH type at driver load. - Plane/pipe state is already checked both when a) enabling, b) disabling and in c) the modeset state checker. No need to go overboard and also check it in in between a) and b). Cc: Paulo Zanoni <przanoni@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/intel_display.c | 9 --------- 1 file changed, 9 deletions(-)