diff mbox

[2/2] drm/i915: enable 30bpp for DP outputs

Message ID 1370108756-1948-2-git-send-email-daniel.vetter@ffwll.ch
State New, archived
Headers show

Commit Message

Daniel Vetter June 1, 2013, 5:45 p.m. UTC
We always limited the link bw calculations to 24bpp. Tested with
my shiny new high-bpc screen, seems to work as advertised.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/intel_dp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Daniel Vetter June 7, 2013, 5:51 a.m. UTC | #1
On Sat, Jun 01, 2013 at 07:45:56PM +0200, Daniel Vetter wrote:
> We always limited the link bw calculations to 24bpp. Tested with
> my shiny new high-bpc screen, seems to work as advertised.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65280
Tested-by: shui yangwei <yangweix.shui@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_dp.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index c92eeeb..9868600 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -704,7 +704,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  
>  	/* Walk through all bpp values. Luckily they're all nicely spaced with 2
>  	 * bpc in between. */
> -	bpp = min_t(int, 8*3, pipe_config->pipe_bpp);
> +	bpp = pipe_config->pipe_bpp;
>  	if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp)
>  		bpp = min_t(int, bpp, dev_priv->vbt.edp_bpp);
>  
> -- 
> 1.7.11.7
>
Chris Wilson June 7, 2013, 8 a.m. UTC | #2
On Fri, Jun 07, 2013 at 07:51:10AM +0200, Daniel Vetter wrote:
> On Sat, Jun 01, 2013 at 07:45:56PM +0200, Daniel Vetter wrote:
> > We always limited the link bw calculations to 24bpp. Tested with
> > my shiny new high-bpc screen, seems to work as advertised.
> > 
> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65280
> Tested-by: shui yangwei <yangweix.shui@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
Daniel Vetter June 7, 2013, 8:35 a.m. UTC | #3
On Fri, Jun 07, 2013 at 09:00:51AM +0100, Chris Wilson wrote:
> On Fri, Jun 07, 2013 at 07:51:10AM +0200, Daniel Vetter wrote:
> > On Sat, Jun 01, 2013 at 07:45:56PM +0200, Daniel Vetter wrote:
> > > We always limited the link bw calculations to 24bpp. Tested with
> > > my shiny new high-bpc screen, seems to work as advertised.
> > > 
> > > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> > 
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65280
> > Tested-by: shui yangwei <yangweix.shui@intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Queued for -next, thanks for the review.
-Daniel
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c92eeeb..9868600 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -704,7 +704,7 @@  intel_dp_compute_config(struct intel_encoder *encoder,
 
 	/* Walk through all bpp values. Luckily they're all nicely spaced with 2
 	 * bpc in between. */
-	bpp = min_t(int, 8*3, pipe_config->pipe_bpp);
+	bpp = pipe_config->pipe_bpp;
 	if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp)
 		bpp = min_t(int, bpp, dev_priv->vbt.edp_bpp);