From patchwork Sun Jun 2 11:26:23 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 2649621 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id DD8A2DFB78 for ; Sun, 2 Jun 2013 11:26:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D9C1EE60A9 for ; Sun, 2 Jun 2013 04:26:40 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ea0-f172.google.com (mail-ea0-f172.google.com [209.85.215.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 09BDFE5C49 for ; Sun, 2 Jun 2013 04:26:31 -0700 (PDT) Received: by mail-ea0-f172.google.com with SMTP id g14so375084eak.17 for ; Sun, 02 Jun 2013 04:26:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=soaDjI0BlkW452ec3hPGf2pOq9e0K2gFg8YPDF575Gw=; b=aU61K66ZxKasb3WT5drNduvCZ/ekMh5lVIOpboaKfsWmiAF/SQxSWvkNMb5Tnz//2x mK4kAk1nmpwLMTMEb8yy55RShh06I2OBg4Je8KndYQPUA0LHSKSPNAC0OLE27sDXOO4+ 9DCUAlXD/+R+cgy8BmOsHvd3iAtl8dsE+oF2E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=soaDjI0BlkW452ec3hPGf2pOq9e0K2gFg8YPDF575Gw=; b=jHPYeiLR8auBNaoIQUUGHK9CTSeQ1va2tFNztXsV9/GJ3MQtRNr3/1U0I5vHxP18kC +84Tp5KSWG0MHgomPdzS2A4IT1UkCk98KkI/f6wjW/1PWro0SEk0dryOzxw2/XQe5BC0 mSlxzKp+YiyKHCvzwNPnxzFdlpjn+mAL7eH2mYw1HPYCc83VdFRqSnr8EbI7MHvnCdtv a+n7ctc7QEwVuc/gW4kIQEDSEQiBZjVcgEJ5cG3XjjjmzZFi3DCqC2rV0AIECKrKZFS9 qMuH5jxsOjKxpoWG6NUh85RQfnZTNKEn6n+rnvBeq4Sgu109vNGhCwrGd5sU/7GW4tw7 vQgg== X-Received: by 10.14.4.130 with SMTP id 2mr19174739eej.125.1370172390773; Sun, 02 Jun 2013 04:26:30 -0700 (PDT) Received: from bremse.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPSA id l6sm78189448eef.12.2013.06.02.04.26.29 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Sun, 02 Jun 2013 04:26:29 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Sun, 2 Jun 2013 13:26:23 +0200 Message-Id: <1370172384-24026-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <20130602100952.GH11399@cantiga.alporthouse.com> References: <20130602100952.GH11399@cantiga.alporthouse.com> X-Gm-Message-State: ALoCoQlJKFvQOYXnWX4hD6sVixC/uLJ+irSYCgDPOOhq4AxRCn1L9hmrrFKhsus0GB973d70RX7A Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 1/2] drm/i915: refactor sink bpp clamping X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org As a prep work to fix it up: - Use intel_connector instead of drm_connector to avoid too much upcasting in the bugfix patch. - Extract the connector bpp clamping from the loop-over-connectors logic. - Bikeshed function names (to make it clearer that acompute_baseline_pipe_bpp runs in the compute stage of the modeset sequence) and add a comment to make it clearer what it does. No functional change in this patch. Cc: Chris Wilson Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 63 +++++++++++++++++++++++------------- 1 file changed, 41 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f410ede..6539edb 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7567,13 +7567,39 @@ static void intel_modeset_commit_output_state(struct drm_device *dev) } } +static void +connected_sink_compute_bpp(struct intel_connector * connector, + struct intel_crtc_config *pipe_config) +{ + int bpp = pipe_config->pipe_bpp; + + DRM_DEBUG_KMS("[CONNECTOR:%d:%s] checking for sink bpp constrains\n", + connector->base.base.id, + drm_get_connector_name(&connector->base)); + + /* Don't use an invalid EDID bpc value */ + if (connector->base.display_info.bpc && + connector->base.display_info.bpc * 3 < bpp) { + DRM_DEBUG_KMS("clamping display bpp (was %d) to EDID reported max of %d\n", + bpp, connector->base.display_info.bpc*3); + pipe_config->pipe_bpp = connector->base.display_info.bpc*3; + } + + /* Clamp bpp to 8 on screens without EDID 1.4 */ + if (connector->base.display_info.bpc == 0 && bpp > 24) { + DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of 24\n", + bpp); + pipe_config->pipe_bpp = 24; + } +} + static int -pipe_config_set_bpp(struct drm_crtc *crtc, - struct drm_framebuffer *fb, - struct intel_crtc_config *pipe_config) +compute_baseline_pipe_bpp(struct intel_crtc *crtc, + struct drm_framebuffer *fb, + struct intel_crtc_config *pipe_config) { - struct drm_device *dev = crtc->dev; - struct drm_connector *connector; + struct drm_device *dev = crtc->base.dev; + struct intel_connector *connector; int bpp; switch (fb->pixel_format) { @@ -7616,24 +7642,12 @@ pipe_config_set_bpp(struct drm_crtc *crtc, /* Clamp display bpp to EDID value */ list_for_each_entry(connector, &dev->mode_config.connector_list, - head) { - if (connector->encoder && connector->encoder->crtc != crtc) + base.head) { + if (connector->base.encoder && + connector->base.encoder->crtc != crtc) continue; - /* Don't use an invalid EDID bpc value */ - if (connector->display_info.bpc && - connector->display_info.bpc * 3 < bpp) { - DRM_DEBUG_KMS("clamping display bpp (was %d) to EDID reported max of %d\n", - bpp, connector->display_info.bpc*3); - pipe_config->pipe_bpp = connector->display_info.bpc*3; - } - - /* Clamp bpp to 8 on screens without EDID 1.4 */ - if (connector->display_info.bpc == 0 && bpp > 24) { - DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of 24\n", - bpp); - pipe_config->pipe_bpp = 24; - } + connected_sink_compute_bpp(connector, pipe_config); } return bpp; @@ -7714,7 +7728,12 @@ intel_modeset_pipe_config(struct drm_crtc *crtc, pipe_config->cpu_transcoder = to_intel_crtc(crtc)->pipe; pipe_config->shared_dpll = DPLL_ID_PRIVATE; - plane_bpp = pipe_config_set_bpp(crtc, fb, pipe_config); + /* Compute a starting value for pipe_config->pipe_bpp taking the source + * plane pixel format and any sink constraints into account. Returns the + * source plane bpp so that dithering can be selected on mismatches + * after encoders and crtc also have had their say. */ + plane_bpp = compute_baseline_pipe_bpp(to_intel_crtc(crtc), + fb, pipe_config); if (plane_bpp < 0) goto fail;