From patchwork Sun Jun 2 11:26:24 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 2649631 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id 3CBA83FC23 for ; Sun, 2 Jun 2013 11:27:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 35EE8E60A9 for ; Sun, 2 Jun 2013 04:27:04 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ea0-f177.google.com (mail-ea0-f177.google.com [209.85.215.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 47ADBE5C49 for ; Sun, 2 Jun 2013 04:26:33 -0700 (PDT) Received: by mail-ea0-f177.google.com with SMTP id j14so375863eak.36 for ; Sun, 02 Jun 2013 04:26:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=npLGbyj3j53tqdMh7xLkQE0unkbeUoW0YAggIOy92Ko=; b=QLsR6aj8B3KlFZ5LZleS1ZQ4z24Z8hgfaIEpFM/TF2LiAKa2OfEwlWqZlwu/ZXW7qN PRWR/gWxBQ0St54R+7mZ5TpJVUgyI6EyI8X7LkiyH1wAqV8D9pWXeXZ/5q1vr01KP7j4 yIMJoFuTYhxROnfqjhn2RzMsymrVzHCWtTQjo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=npLGbyj3j53tqdMh7xLkQE0unkbeUoW0YAggIOy92Ko=; b=iAcPODXIQW8NBm0NtliR4M+enUWF8napnwNMcS9lJLnpEkLhjQaRK0CfjC0utXYW+n dXkYEKZlcRkODzjzNH1hKeWMr3Z2Wij5/WinqDaBAICWrRFvl1jIsnshWEXwhTTxcAcv ifI62NXee5m/OlziUnLhdFTKhHWVSiXXIMzd1Sgr8sSFqKXiW1aMHpwFlvLa/PAQGBRg eU3j6gV5JScTNXKJnMgGerh8Wwxw+JULG4RUfoDhjFFrHLtqRLzpPQtw0/h8Qfp76vk0 +uvyVd5HDN7eBqaM8xfwsPzid0Q8p9jfBl1kWrTPNdusji0MP59TDVPYhAq6EEkfjXd+ 1fyA== X-Received: by 10.15.10.197 with SMTP id g45mr3638589eet.132.1370172392362; Sun, 02 Jun 2013 04:26:32 -0700 (PDT) Received: from bremse.ffwll.local (178-83-130-250.dynamic.hispeed.ch. [178.83.130.250]) by mx.google.com with ESMTPSA id l6sm78189448eef.12.2013.06.02.04.26.30 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Sun, 02 Jun 2013 04:26:31 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Sun, 2 Jun 2013 13:26:24 +0200 Message-Id: <1370172384-24026-2-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1370172384-24026-1-git-send-email-daniel.vetter@ffwll.ch> References: <20130602100952.GH11399@cantiga.alporthouse.com> <1370172384-24026-1-git-send-email-daniel.vetter@ffwll.ch> X-Gm-Message-State: ALoCoQnBbKmRIUAHMnGlWe87/yFJkNsH73MdrfRFsFz8hOZp4cU09ZVTeSblcYDT2z/JQEp8bo6I Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 2/2] drm/i915: fix EDID/sink-based bpp clamping X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Since this is run in the compute config stage we need to check the new_ pointers, i.e the stage output routing, not the current modeset layout. Also there was a little logic bug in properly skipping connectors: The old code did not skip any unused connectors and so clamped to whatever was left in there (usually 0 if that connector hasn't seen a EDID 1.4 screen ever since boot-up). This has been broken when moving the pipe bpp selection in commit 4e53c2e010e531b4a014692199e978482d471c7e Author: Daniel Vetter Date: Wed Mar 27 00:44:58 2013 +0100 drm/i915: precompute pipe bpp before touching the hw To avoid too much casting switch from drm_ to intel_ types. Also add a bit of debug output to help reconstructing what's going on. v2: Try to clarify this a bit: - s/pipe_config_set_bpp/compute_baseline_pipe_bpp/ to make it clearer at which stage this function is run. Also add a comment about what it does. - Extract the sink clamping into it's own function. v3: Actually make it compile. v4: Split out all the prep refactoring to make the bugfix stick out really badly. Also elaborate a bit in the commit message about the nature of the bugfix. Cc: Chris Wilson Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 6539edb..d4b56cb 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7643,8 +7643,8 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc, /* Clamp display bpp to EDID value */ list_for_each_entry(connector, &dev->mode_config.connector_list, base.head) { - if (connector->base.encoder && - connector->base.encoder->crtc != crtc) + if (!connector->new_encoder || + connector->new_encoder->new_crtc != crtc) continue; connected_sink_compute_bpp(connector, pipe_config);