| Message ID | 1370342947-20757-3-git-send-email-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> On Tue, Jun 4, 2013 at 7:49 AM, <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Follow the same sequence when enabling the cursor plane during > modeset. No point in doing this stuff in different order on different > generations. > > This should also avoid a needless wait for vblank for the g4x cursor > workaround when the cursor gets enabled anyway. > > Acked-by: Egbert Eich <eich@suse.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_display.c | 10 ++++------ > 1 file changed, 4 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index c28b402..c2e6e91 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3216,6 +3216,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) > intel_enable_pipe(dev_priv, pipe, > intel_crtc->config.has_pch_encoder); > intel_enable_plane(dev_priv, plane, pipe); > + intel_crtc_update_cursor(crtc, true); > > if (intel_crtc->config.has_pch_encoder) > ironlake_pch_enable(crtc); > @@ -3224,8 +3225,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) > intel_update_fbc(dev); > mutex_unlock(&dev->struct_mutex); > > - intel_crtc_update_cursor(crtc, true); > - > for_each_encoder_on_crtc(dev, crtc, encoder) > encoder->enable(encoder); > > @@ -3325,6 +3324,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) > intel_enable_pipe(dev_priv, pipe, > intel_crtc->config.has_pch_encoder); > intel_enable_plane(dev_priv, plane, pipe); > + intel_crtc_update_cursor(crtc, true); > > hsw_enable_ips(intel_crtc); > > @@ -3335,8 +3335,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) > intel_update_fbc(dev); > mutex_unlock(&dev->struct_mutex); > > - intel_crtc_update_cursor(crtc, true); > - > for_each_encoder_on_crtc(dev, crtc, encoder) > encoder->enable(encoder); > > @@ -3619,12 +3617,12 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) > > intel_enable_pipe(dev_priv, pipe, false); > intel_enable_plane(dev_priv, plane, pipe); > + intel_crtc_update_cursor(crtc, true); > > intel_update_fbc(dev); > > /* Give the overlay scaler a chance to enable if it's on this pipe */ > intel_crtc_dpms_overlay(intel_crtc, true); > - intel_crtc_update_cursor(crtc, true); > > mutex_unlock(&dev_priv->dpio_lock); > } > @@ -3659,6 +3657,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) > > intel_enable_pipe(dev_priv, pipe, false); > intel_enable_plane(dev_priv, plane, pipe); > + intel_crtc_update_cursor(crtc, true); > if (IS_G4X(dev)) > g4x_fixup_plane(dev_priv, pipe); > > @@ -3666,7 +3665,6 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) > > /* Give the overlay scaler a chance to enable if it's on this pipe */ > intel_crtc_dpms_overlay(intel_crtc, true); > - intel_crtc_update_cursor(crtc, true); > > for_each_encoder_on_crtc(dev, crtc, encoder) > encoder->enable(encoder); > -- > 1.8.1.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c28b402..c2e6e91 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3216,6 +3216,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) intel_enable_pipe(dev_priv, pipe, intel_crtc->config.has_pch_encoder); intel_enable_plane(dev_priv, plane, pipe); + intel_crtc_update_cursor(crtc, true); if (intel_crtc->config.has_pch_encoder) ironlake_pch_enable(crtc); @@ -3224,8 +3225,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) intel_update_fbc(dev); mutex_unlock(&dev->struct_mutex); - intel_crtc_update_cursor(crtc, true); - for_each_encoder_on_crtc(dev, crtc, encoder) encoder->enable(encoder); @@ -3325,6 +3324,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) intel_enable_pipe(dev_priv, pipe, intel_crtc->config.has_pch_encoder); intel_enable_plane(dev_priv, plane, pipe); + intel_crtc_update_cursor(crtc, true); hsw_enable_ips(intel_crtc); @@ -3335,8 +3335,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) intel_update_fbc(dev); mutex_unlock(&dev->struct_mutex); - intel_crtc_update_cursor(crtc, true); - for_each_encoder_on_crtc(dev, crtc, encoder) encoder->enable(encoder); @@ -3619,12 +3617,12 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) intel_enable_pipe(dev_priv, pipe, false); intel_enable_plane(dev_priv, plane, pipe); + intel_crtc_update_cursor(crtc, true); intel_update_fbc(dev); /* Give the overlay scaler a chance to enable if it's on this pipe */ intel_crtc_dpms_overlay(intel_crtc, true); - intel_crtc_update_cursor(crtc, true); mutex_unlock(&dev_priv->dpio_lock); } @@ -3659,6 +3657,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) intel_enable_pipe(dev_priv, pipe, false); intel_enable_plane(dev_priv, plane, pipe); + intel_crtc_update_cursor(crtc, true); if (IS_G4X(dev)) g4x_fixup_plane(dev_priv, pipe); @@ -3666,7 +3665,6 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) /* Give the overlay scaler a chance to enable if it's on this pipe */ intel_crtc_dpms_overlay(intel_crtc, true); - intel_crtc_update_cursor(crtc, true); for_each_encoder_on_crtc(dev, crtc, encoder) encoder->enable(encoder);