| Message ID | 1370432073-27634-20-git-send-email-daniel.vetter@ffwll.ch (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Jun 05, 2013 at 01:34:21PM +0200, Daniel Vetter wrote: > We have a nice comment saying that the pixel multiplier only sticks > once the vco is on and stable. The only problem is that the enable bit > wasn't set at all. This patch fixes this and so brings the ilk+ pch > pll code in line with the i8xx/i9xx pll code. Or at least improves > matters a lot. > > This should fix sdvo on ilk-ivb for low-res modes. > > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
On Wed, Jun 12, 2013 at 04:12:48PM +0100, Damien Lespiau wrote: > On Wed, Jun 05, 2013 at 01:34:21PM +0200, Daniel Vetter wrote: > > We have a nice comment saying that the pixel multiplier only sticks > > once the vco is on and stable. The only problem is that the enable bit > > wasn't set at all. This patch fixes this and so brings the ilk+ pch > > pll code in line with the i8xx/i9xx pll code. Or at least improves > > matters a lot. > > > > This should fix sdvo on ilk-ivb for low-res modes. > > > > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> > > Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Merged thus far, thanks a lot for the review. -Daniel > > -- > Damien > > > --- > > drivers/gpu/drm/i915/intel_display.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > > index a30e27a..ecf0b1e 100644 > > --- a/drivers/gpu/drm/i915/intel_display.c > > +++ b/drivers/gpu/drm/i915/intel_display.c > > @@ -5601,7 +5601,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc, > > else > > dpll |= PLL_REF_INPUT_DREFCLK; > > > > - return dpll; > > + return dpll | DPLL_VCO_ENABLE; > > } > > > > static int ironlake_crtc_mode_set(struct drm_crtc *crtc, > > @@ -5663,7 +5663,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, > > &fp, &reduced_clock, > > has_reduced_clock ? &fp2 : NULL); > > > > - intel_crtc->config.dpll_hw_state.dpll = dpll | DPLL_VCO_ENABLE; > > + intel_crtc->config.dpll_hw_state.dpll = dpll; > > intel_crtc->config.dpll_hw_state.fp0 = fp; > > if (has_reduced_clock) > > intel_crtc->config.dpll_hw_state.fp1 = fp2; > > -- > > 1.7.11.7 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a30e27a..ecf0b1e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5601,7 +5601,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc, else dpll |= PLL_REF_INPUT_DREFCLK; - return dpll; + return dpll | DPLL_VCO_ENABLE; } static int ironlake_crtc_mode_set(struct drm_crtc *crtc, @@ -5663,7 +5663,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, &fp, &reduced_clock, has_reduced_clock ? &fp2 : NULL); - intel_crtc->config.dpll_hw_state.dpll = dpll | DPLL_VCO_ENABLE; + intel_crtc->config.dpll_hw_state.dpll = dpll; intel_crtc->config.dpll_hw_state.fp0 = fp; if (has_reduced_clock) intel_crtc->config.dpll_hw_state.fp1 = fp2;
We have a nice comment saying that the pixel multiplier only sticks once the vco is on and stable. The only problem is that the enable bit wasn't set at all. This patch fixes this and so brings the ilk+ pch pll code in line with the i8xx/i9xx pll code. Or at least improves matters a lot. This should fix sdvo on ilk-ivb for low-res modes. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)