| Message ID | 1371070554-1947-2-git-send-email-rodrigo.vivi@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
2013/6/12 Rodrigo Vivi <rodrigo.vivi@gmail.com>: > From: Shobhit Kumar <shobhit.kumar@intel.com> > > v2: reuse of just created is_edp_psr and put it at right place. > v3: move is_edp_psr above intel_edp_disable > > Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> > Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/intel_dp.c | 13 +++++++++++++ > drivers/gpu/drm/i915/intel_drv.h | 1 + > 2 files changed, 14 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 759a1c5..5332186 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1342,6 +1342,12 @@ static void intel_dp_get_config(struct intel_encoder *encoder, > pipe_config->adjusted_mode.flags |= flags; > } > > +static bool is_edp_psr(struct intel_dp *intel_dp) > +{ > + return (is_edp(intel_dp) && > + (intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED)); > +} My only concern about this is: what will happen when they define PSR version 02? Will that DP_PSR_IS_SUPPORTED bit still be 1? Anyway, if things change in the future we should fix the DP_PSR_IS_SUPPORTED definition and all its users, so for now I think the code is fine. The patch looks good and I think that we could try to merge patches 1 and 2 now because they allow us to at least properly detect which panels support PSR and which panels don't. Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > + > static void intel_disable_dp(struct intel_encoder *encoder) > { > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > @@ -2255,6 +2261,13 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) > if (intel_dp->dpcd[DP_DPCD_REV] == 0) > return false; /* DPCD not present */ > > + /* Check if the panel supports PSR */ > + memset(intel_dp->psr_dpcd, 0, sizeof(intel_dp->psr_dpcd)); > + intel_dp_aux_native_read_retry(intel_dp, DP_PSR_SUPPORT, > + intel_dp->psr_dpcd, > + sizeof(intel_dp->psr_dpcd)); > + if (is_edp_psr(intel_dp)) > + DRM_DEBUG_KMS("Detected EDP PSR Panel.\n"); > if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & > DP_DWN_STRM_PORT_PRESENT)) > return true; /* native DP sink */ > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index 0445d8c..18d9dea 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -470,6 +470,7 @@ struct intel_dp { > uint8_t link_bw; > uint8_t lane_count; > uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; > + uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE]; > uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS]; > struct i2c_adapter adapter; > struct i2c_algo_dp_aux_data algo; > -- > 1.7.11.7 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 759a1c5..5332186 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1342,6 +1342,12 @@ static void intel_dp_get_config(struct intel_encoder *encoder, pipe_config->adjusted_mode.flags |= flags; } +static bool is_edp_psr(struct intel_dp *intel_dp) +{ + return (is_edp(intel_dp) && + (intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED)); +} + static void intel_disable_dp(struct intel_encoder *encoder) { struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); @@ -2255,6 +2261,13 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) if (intel_dp->dpcd[DP_DPCD_REV] == 0) return false; /* DPCD not present */ + /* Check if the panel supports PSR */ + memset(intel_dp->psr_dpcd, 0, sizeof(intel_dp->psr_dpcd)); + intel_dp_aux_native_read_retry(intel_dp, DP_PSR_SUPPORT, + intel_dp->psr_dpcd, + sizeof(intel_dp->psr_dpcd)); + if (is_edp_psr(intel_dp)) + DRM_DEBUG_KMS("Detected EDP PSR Panel.\n"); if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT)) return true; /* native DP sink */ diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 0445d8c..18d9dea 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -470,6 +470,7 @@ struct intel_dp { uint8_t link_bw; uint8_t lane_count; uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; + uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE]; uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS]; struct i2c_adapter adapter; struct i2c_algo_dp_aux_data algo;