| Message ID | 1372112229-9129-1-git-send-email-ben@bwidawsk.net (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, 24 Jun 2013 15:17:09 -0700 Ben Widawsky <ben@bwidawsk.net> wrote: > With updates to the spec, we can actually see the context layout, and > how many dwords are allocated. That table suggests we need 70720 bytes > per HW context. Rounded up, this is 18 pages. Looking at what lives > after the current 4 pages we use, I can't see too much important (mostly > it's d3d related), but there are a couple of things which look scary. I > am hopeful this can explain some of our odd HSW failures. > > v2: Make the context only 17 pages. The power context space isn't used > ever, and execlists aren't used in our driver, making the actual total > 66944 bytes. > > Reported-by: "Azad, Vinit" <vinit.azad@intel.com> > Cc: stable@vger.kernel.org > Signed-off-by: Ben Widawsky <ben@bwidawsk.net> > --- > drivers/gpu/drm/i915/i915_gem_context.c | 2 +- > drivers/gpu/drm/i915/i915_reg.h | 9 +-------- > 2 files changed, 2 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c > index ff47145..51b7a21 100644 > --- a/drivers/gpu/drm/i915/i915_gem_context.c > +++ b/drivers/gpu/drm/i915/i915_gem_context.c > @@ -113,7 +113,7 @@ static int get_context_size(struct drm_device *dev) > case 7: > reg = I915_READ(GEN7_CXT_SIZE); > if (IS_HASWELL(dev)) > - ret = HSW_CXT_TOTAL_SIZE(reg) * 64; > + ret = HSW_CXT_TOTAL_SIZE; > else > ret = GEN7_CXT_TOTAL_SIZE(reg) * 64; > break; > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 2102ff3..f061c67 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1718,14 +1718,7 @@ > GEN7_CXT_EXTENDED_SIZE(ctx_reg) + \ > GEN7_CXT_GT1_SIZE(ctx_reg) + \ > GEN7_CXT_VFSTATE_SIZE(ctx_reg)) > -#define HSW_CXT_POWER_SIZE(ctx_reg) ((ctx_reg >> 26) & 0x3f) > -#define HSW_CXT_RING_SIZE(ctx_reg) ((ctx_reg >> 23) & 0x7) > -#define HSW_CXT_RENDER_SIZE(ctx_reg) ((ctx_reg >> 15) & 0xff) > -#define HSW_CXT_TOTAL_SIZE(ctx_reg) (HSW_CXT_POWER_SIZE(ctx_reg) + \ > - HSW_CXT_RING_SIZE(ctx_reg) + \ > - HSW_CXT_RENDER_SIZE(ctx_reg) + \ > - GEN7_CXT_VFSTATE_SIZE(ctx_reg)) > - > +#define HSW_CXT_TOTAL_SIZE (17 * PAGE_SIZE) > > /* > * Overlay regs Yeah, we can't rely on the reg I guess, and this matches the docs (though they don't make it easy to figure it out)... I'd like to see a reference to the bspec where this information is kept, but other than that: Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index ff47145..51b7a21 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -113,7 +113,7 @@ static int get_context_size(struct drm_device *dev) case 7: reg = I915_READ(GEN7_CXT_SIZE); if (IS_HASWELL(dev)) - ret = HSW_CXT_TOTAL_SIZE(reg) * 64; + ret = HSW_CXT_TOTAL_SIZE; else ret = GEN7_CXT_TOTAL_SIZE(reg) * 64; break; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 2102ff3..f061c67 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1718,14 +1718,7 @@ GEN7_CXT_EXTENDED_SIZE(ctx_reg) + \ GEN7_CXT_GT1_SIZE(ctx_reg) + \ GEN7_CXT_VFSTATE_SIZE(ctx_reg)) -#define HSW_CXT_POWER_SIZE(ctx_reg) ((ctx_reg >> 26) & 0x3f) -#define HSW_CXT_RING_SIZE(ctx_reg) ((ctx_reg >> 23) & 0x7) -#define HSW_CXT_RENDER_SIZE(ctx_reg) ((ctx_reg >> 15) & 0xff) -#define HSW_CXT_TOTAL_SIZE(ctx_reg) (HSW_CXT_POWER_SIZE(ctx_reg) + \ - HSW_CXT_RING_SIZE(ctx_reg) + \ - HSW_CXT_RENDER_SIZE(ctx_reg) + \ - GEN7_CXT_VFSTATE_SIZE(ctx_reg)) - +#define HSW_CXT_TOTAL_SIZE (17 * PAGE_SIZE) /* * Overlay regs
With updates to the spec, we can actually see the context layout, and how many dwords are allocated. That table suggests we need 70720 bytes per HW context. Rounded up, this is 18 pages. Looking at what lives after the current 4 pages we use, I can't see too much important (mostly it's d3d related), but there are a couple of things which look scary. I am hopeful this can explain some of our odd HSW failures. v2: Make the context only 17 pages. The power context space isn't used ever, and execlists aren't used in our driver, making the actual total 66944 bytes. Reported-by: "Azad, Vinit" <vinit.azad@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Ben Widawsky <ben@bwidawsk.net> --- drivers/gpu/drm/i915/i915_gem_context.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 9 +-------- 2 files changed, 2 insertions(+), 9 deletions(-)